diff --git a/access_control_python/__pycache__/access_control.cpython-311.pyc b/access_control_python/__pycache__/access_control.cpython-311.pyc index b0c12f7..2bbca13 100644 Binary files a/access_control_python/__pycache__/access_control.cpython-311.pyc and b/access_control_python/__pycache__/access_control.cpython-311.pyc differ diff --git a/access_control_python/access_control.py b/access_control_python/access_control.py index 06e2421..a9dcbdc 100644 --- a/access_control_python/access_control.py +++ b/access_control_python/access_control.py @@ -1,20 +1,37 @@ import serial +import time from threading import Thread class access_control: + _in_payloads = [] _read_buffer = [] + _door_state: bool = 0 serial_adapter: serial.Serial def __init__(self, serial_port: str): self.serial_adapter = serial.Serial(serial_port,baudrate=115200) - #Thread(target=self.read_serial).start() + Thread(target=self.read_serial).start() + Thread(target=self._process_payload).start() def read_serial(self): while True: - if True: - print("Reading Serial") - data = self.serial_adapter.read_until(0xFF) - print(data) - #data = data.decode("ascii").removesuffix("\r\n") - self._read_buffer.append(data) + if self.serial_adapter.in_waiting: + in_byte = self.serial_adapter.read(1) + if(in_byte==b'\xFF'): + self._in_payloads.append(self._read_buffer) + self._read_buffer = [] + else: + self._read_buffer.append(in_byte) + def _process_payload(self): + while True: + self._process_payload_once() + + def _process_payload_once(self): + if(len(self._in_payloads)>0): + payload = self._in_payloads.pop(0) + if(payload[0]==b'\x01'): + if(payload[1]==b'\x00'): + self._door_state = True + elif(payload[1]==b'\01'): + self._door_state = False def light_on(self): packet = bytearray() packet.append(0x00) @@ -27,8 +44,12 @@ class access_control: packet.append(0x00) packet.append(0xFF) self.serial_adapter.write(packet) - def request_door_state(self): + def _request_door_state(self): packet = bytearray() packet.append(0x01) packet.append(0xFF) - self.serial_adapter.write(packet) \ No newline at end of file + self.serial_adapter.write(packet) + def get_door_state(self) -> bool: + self._request_door_state() + time.sleep(0.25) + return self._door_state \ No newline at end of file diff --git a/access_control_python/main.py b/access_control_python/main.py index 3a67ecf..002de67 100644 --- a/access_control_python/main.py +++ b/access_control_python/main.py @@ -1,10 +1,10 @@ from access_control import access_control import time -stm32 = access_control("COM7") +stm32 = access_control("COM12") time.sleep(1) while True: - stm32.request_door_state() - kkc =stm32.serial_adapter.read(2) - print(kkc) - time.sleep(0.5) \ No newline at end of file + if(stm32.get_door_state() == True): + print("Door is Closed") + else: + print("Door is Openned") diff --git a/access_control_stm32/.settings/language.settings.xml b/access_control_stm32/.settings/language.settings.xml index 15f6ae8..f843df6 100644 --- a/access_control_stm32/.settings/language.settings.xml +++ b/access_control_stm32/.settings/language.settings.xml @@ -5,7 +5,7 @@ - + @@ -16,7 +16,7 @@ - + diff --git a/access_control_stm32/.settings/stm32cubeide.project.prefs b/access_control_stm32/.settings/stm32cubeide.project.prefs index cd085b3..702b2a4 100644 --- a/access_control_stm32/.settings/stm32cubeide.project.prefs +++ b/access_control_stm32/.settings/stm32cubeide.project.prefs @@ -1,5 +1,5 @@ 635E684B79701B039C64EA45C3F84D30=0128DB7B22BCDE154FEB5F4DBED2CA57 66BE74F758C12D739921AEA421D593D3=4 -8DF89ED150041C4CBC7CB9A9CAA90856=AB868319CB57203C6EBBFA9F981B52E0 -DC22A860405A8BF2F2C095E5B6529F12=AB868319CB57203C6EBBFA9F981B52E0 +8DF89ED150041C4CBC7CB9A9CAA90856=2C6D56F1655FD58902B46B19116A62EB +DC22A860405A8BF2F2C095E5B6529F12=363334336619A6574C7D7388DE56AD2C eclipse.preferences.version=1 diff --git a/access_control_stm32/Debug/Core/Src/main.cyclo b/access_control_stm32/Debug/Core/Src/main.cyclo index 8458c9f..7925410 100644 --- a/access_control_stm32/Debug/Core/Src/main.cyclo +++ b/access_control_stm32/Debug/Core/Src/main.cyclo @@ -1,5 +1,5 @@ -../Core/Src/main.c:67:5:main 1 -../Core/Src/main.c:130:6:SystemClock_Config 3 -../Core/Src/main.c:174:13:MX_USART2_UART_Init 2 -../Core/Src/main.c:205:13:MX_GPIO_Init 1 -../Core/Src/main.c:250:6:Error_Handler 1 +../Core/Src/main.c:67:5:main 6 +../Core/Src/main.c:128:6:SystemClock_Config 3 +../Core/Src/main.c:172:13:MX_USART2_UART_Init 2 +../Core/Src/main.c:203:13:MX_GPIO_Init 1 +../Core/Src/main.c:248:6:Error_Handler 1 diff --git a/access_control_stm32/Debug/Core/Src/main.o b/access_control_stm32/Debug/Core/Src/main.o index 88bf8d3..f7c8f72 100644 Binary files a/access_control_stm32/Debug/Core/Src/main.o and b/access_control_stm32/Debug/Core/Src/main.o differ diff --git a/access_control_stm32/Debug/Core/Src/main.su b/access_control_stm32/Debug/Core/Src/main.su index facc2af..3c4e371 100644 --- a/access_control_stm32/Debug/Core/Src/main.su +++ b/access_control_stm32/Debug/Core/Src/main.su @@ -1,5 +1,5 @@ -../Core/Src/main.c:67:5:main 8 static -../Core/Src/main.c:130:6:SystemClock_Config 88 static -../Core/Src/main.c:174:13:MX_USART2_UART_Init 8 static -../Core/Src/main.c:205:13:MX_GPIO_Init 48 static -../Core/Src/main.c:250:6:Error_Handler 4 static,ignoring_inline_asm +../Core/Src/main.c:67:5:main 16 static +../Core/Src/main.c:128:6:SystemClock_Config 88 static +../Core/Src/main.c:172:13:MX_USART2_UART_Init 8 static +../Core/Src/main.c:203:13:MX_GPIO_Init 48 static +../Core/Src/main.c:248:6:Error_Handler 4 static,ignoring_inline_asm diff --git a/access_control_stm32/Debug/Core/Src/stm32f4xx_hal_msp.o b/access_control_stm32/Debug/Core/Src/stm32f4xx_hal_msp.o index 15a5796..bedcc7c 100644 Binary files a/access_control_stm32/Debug/Core/Src/stm32f4xx_hal_msp.o and b/access_control_stm32/Debug/Core/Src/stm32f4xx_hal_msp.o differ diff --git a/access_control_stm32/Debug/Core/Src/stm32f4xx_it.o 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a/access_control_stm32/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.o and b/access_control_stm32/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.o differ diff --git a/access_control_stm32/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.o b/access_control_stm32/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.o index 1fb4420..4b7c895 100644 Binary files a/access_control_stm32/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.o and b/access_control_stm32/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.o differ diff --git a/access_control_stm32/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o b/access_control_stm32/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o index 8d3203c..c1a874a 100644 Binary files a/access_control_stm32/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o and b/access_control_stm32/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o differ diff --git a/access_control_stm32/Debug/access_control_stm32.elf b/access_control_stm32/Debug/access_control_stm32.elf index fe6cc01..f6e825a 100644 Binary files a/access_control_stm32/Debug/access_control_stm32.elf and b/access_control_stm32/Debug/access_control_stm32.elf differ diff --git a/access_control_stm32/Debug/access_control_stm32.list b/access_control_stm32/Debug/access_control_stm32.list index e5d65c7..accbd3c 100644 --- a/access_control_stm32/Debug/access_control_stm32.list +++ b/access_control_stm32/Debug/access_control_stm32.list @@ -5,47 +5,47 @@ Sections: Idx Name Size VMA LMA File off Algn 0 .isr_vector 00000198 08000000 08000000 00010000 2**0 CONTENTS, ALLOC, LOAD, READONLY, DATA - 1 .text 00001e58 08000198 08000198 00010198 2**2 + 1 .text 00002054 08000198 08000198 00010198 2**2 CONTENTS, ALLOC, LOAD, READONLY, CODE - 2 .rodata 00000020 08001ff0 08001ff0 00011ff0 2**2 + 2 .rodata 00000018 080021ec 080021ec 000121ec 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA - 3 .ARM.extab 00000000 08002010 08002010 0002000c 2**0 + 3 .ARM.extab 00000000 08002204 08002204 0002000c 2**0 CONTENTS - 4 .ARM 00000008 08002010 08002010 00012010 2**2 + 4 .ARM 00000008 08002204 08002204 00012204 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA - 5 .preinit_array 00000000 08002018 08002018 0002000c 2**0 + 5 .preinit_array 00000000 0800220c 0800220c 0002000c 2**0 CONTENTS, ALLOC, LOAD, DATA - 6 .init_array 00000004 08002018 08002018 00012018 2**2 + 6 .init_array 00000004 0800220c 0800220c 0001220c 2**2 CONTENTS, ALLOC, LOAD, DATA - 7 .fini_array 00000004 0800201c 0800201c 0001201c 2**2 + 7 .fini_array 00000004 08002210 08002210 00012210 2**2 CONTENTS, ALLOC, LOAD, DATA - 8 .data 0000000c 20000000 08002020 00020000 2**2 + 8 .data 0000000c 20000000 08002214 00020000 2**2 CONTENTS, ALLOC, LOAD, DATA - 9 .bss 00000070 2000000c 0800202c 0002000c 2**2 + 9 .bss 00000070 2000000c 08002220 0002000c 2**2 ALLOC - 10 ._user_heap_stack 00000604 2000007c 0800202c 0002007c 2**0 + 10 ._user_heap_stack 00000604 2000007c 08002220 0002007c 2**0 ALLOC 11 .ARM.attributes 00000030 00000000 00000000 0002000c 2**0 CONTENTS, READONLY 12 .comment 00000043 00000000 00000000 0002003c 2**0 CONTENTS, READONLY - 13 .debug_info 000070ba 00000000 00000000 0002007f 2**0 + 13 .debug_info 00007126 00000000 00000000 0002007f 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 14 .debug_abbrev 000012d1 00000000 00000000 00027139 2**0 + 14 .debug_abbrev 000012ea 00000000 00000000 000271a5 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 15 .debug_aranges 00000608 00000000 00000000 00028410 2**3 + 15 .debug_aranges 00000608 00000000 00000000 00028490 2**3 CONTENTS, READONLY, DEBUGGING, OCTETS - 16 .debug_rnglists 0000049c 00000000 00000000 00028a18 2**0 + 16 .debug_rnglists 0000049d 00000000 00000000 00028a98 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 17 .debug_macro 0001483d 00000000 00000000 00028eb4 2**0 + 17 .debug_macro 0001483d 00000000 00000000 00028f35 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 18 .debug_line 00007952 00000000 00000000 0003d6f1 2**0 + 18 .debug_line 0000798a 00000000 00000000 0003d772 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 19 .debug_str 000818ec 00000000 00000000 00045043 2**0 + 19 .debug_str 000818db 00000000 00000000 000450fc 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 20 .debug_frame 000017a4 00000000 00000000 000c6930 2**2 + 20 .debug_frame 000017a8 00000000 00000000 000c69d8 2**2 CONTENTS, READONLY, DEBUGGING, OCTETS - 21 .debug_line_str 00000072 00000000 00000000 000c80d4 2**0 + 21 .debug_line_str 00000059 00000000 00000000 000c8180 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS Disassembly of section .text: @@ -64,7 +64,7 @@ Disassembly of section .text: 80001ae: bd10 pop {r4, pc} 80001b0: 2000000c .word 0x2000000c 80001b4: 00000000 .word 0x00000000 - 80001b8: 08001fd8 .word 0x08001fd8 + 80001b8: 080021d4 .word 0x080021d4 080001bc : 80001bc: b508 push {r3, lr} @@ -76,7 +76,7 @@ Disassembly of section .text: 80001ca: bd08 pop {r3, pc} 80001cc: 00000000 .word 0x00000000 80001d0: 20000010 .word 0x20000010 - 80001d4: 08001fd8 .word 0x08001fd8 + 80001d4: 080021d4 .word 0x080021d4 080001d8 <__aeabi_uldivmod>: 80001d8: b953 cbnz r3, 80001f0 <__aeabi_uldivmod+0x18> @@ -359,4486 +359,4844 @@ Disassembly of section .text: */ int main(void) { 80004d4: b580 push {r7, lr} - 80004d6: af00 add r7, sp, #0 + 80004d6: b082 sub sp, #8 + 80004d8: af00 add r7, sp, #0 /* USER CODE END 1 */ /* MCU Configuration--------------------------------------------------------*/ /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ HAL_Init(); - 80004d8: f000 fa02 bl 80008e0 + 80004da: f000 fa45 bl 8000968 /* USER CODE BEGIN Init */ /* USER CODE END Init */ /* Configure the system clock */ SystemClock_Config(); - 80004dc: f000 f816 bl 800050c + 80004de: f000 f859 bl 8000594 /* USER CODE BEGIN SysInit */ /* USER CODE END SysInit */ /* Initialize all configured peripherals */ MX_GPIO_Init(); - 80004e0: f000 f8a8 bl 8000634 + 80004e2: f000 f8eb bl 80006bc MX_USART2_UART_Init(); - 80004e4: f000 f87c bl 80005e0 + 80004e6: f000 f8bf bl 8000668 /* USER CODE BEGIN 2 */ memset(uart_buffer, 0, 10); - 80004e8: 220a movs r2, #10 - 80004ea: 2100 movs r1, #0 - 80004ec: 4804 ldr r0, [pc, #16] ; (8000500 ) - 80004ee: f001 fd47 bl 8001f80 -// } -// uart_index = 0; -// memset(uart_buffer, 0, 10); -// } -// } - HAL_UART_Transmit(&huart2, (uint8_t*)"Hello", 5, 100); - 80004f2: 2364 movs r3, #100 ; 0x64 - 80004f4: 2205 movs r2, #5 - 80004f6: 4903 ldr r1, [pc, #12] ; (8000504 ) - 80004f8: 4803 ldr r0, [pc, #12] ; (8000508 ) - 80004fa: f001 f9cc bl 8001896 - 80004fe: e7f8 b.n 80004f2 - 8000500: 2000006c .word 0x2000006c - 8000504: 08001ff0 .word 0x08001ff0 - 8000508: 20000028 .word 0x20000028 + 80004ea: 220a movs r2, #10 + 80004ec: 2100 movs r1, #0 + 80004ee: 4825 ldr r0, [pc, #148] ; (8000584 ) + 80004f0: f001 fe44 bl 800217c -0800050c : + /* Infinite loop */ + /* USER CODE BEGIN WHILE */ + while (1) { + + if (HAL_UART_Receive(&huart2, uart_buffer + uart_index, 1, 250) + 80004f4: 4b24 ldr r3, [pc, #144] ; (8000588 ) + 80004f6: 781b ldrb r3, [r3, #0] + 80004f8: 461a mov r2, r3 + 80004fa: 4b22 ldr r3, [pc, #136] ; (8000584 ) + 80004fc: 18d1 adds r1, r2, r3 + 80004fe: 23fa movs r3, #250 ; 0xfa + 8000500: 2201 movs r2, #1 + 8000502: 4822 ldr r0, [pc, #136] ; (800058c ) + 8000504: f001 fab5 bl 8001a72 + 8000508: 4603 mov r3, r0 + 800050a: 2b00 cmp r3, #0 + 800050c: d1f2 bne.n 80004f4 + == HAL_OK) { + uart_index++; + 800050e: 4b1e ldr r3, [pc, #120] ; (8000588 ) + 8000510: 781b ldrb r3, [r3, #0] + 8000512: 3301 adds r3, #1 + 8000514: b2da uxtb r2, r3 + 8000516: 4b1c ldr r3, [pc, #112] ; (8000588 ) + 8000518: 701a strb r2, [r3, #0] + if (uart_buffer[uart_index - 1] == 0xFF) { + 800051a: 4b1b ldr r3, [pc, #108] ; (8000588 ) + 800051c: 781b ldrb r3, [r3, #0] + 800051e: 3b01 subs r3, #1 + 8000520: 4a18 ldr r2, [pc, #96] ; (8000584 ) + 8000522: 5cd3 ldrb r3, [r2, r3] + 8000524: 2bff cmp r3, #255 ; 0xff + 8000526: d1e5 bne.n 80004f4 + if (uart_index > 1) { + 8000528: 4b17 ldr r3, [pc, #92] ; (8000588 ) + 800052a: 781b ldrb r3, [r3, #0] + 800052c: 2b01 cmp r3, #1 + 800052e: d920 bls.n 8000572 + if (uart_buffer[0] == 0x00) { + 8000530: 4b14 ldr r3, [pc, #80] ; (8000584 ) + 8000532: 781b ldrb r3, [r3, #0] + 8000534: 2b00 cmp r3, #0 + 8000536: d107 bne.n 8000548 + HAL_GPIO_WritePin(GPIOA, GPIO_PIN_5, uart_buffer[1]); + 8000538: 4b12 ldr r3, [pc, #72] ; (8000584 ) + 800053a: 785b ldrb r3, [r3, #1] + 800053c: 461a mov r2, r3 + 800053e: 2120 movs r1, #32 + 8000540: 4813 ldr r0, [pc, #76] ; (8000590 ) + 8000542: f000 fd05 bl 8000f50 + 8000546: e014 b.n 8000572 + } else if (uart_buffer[0] == 0x01) { + 8000548: 4b0e ldr r3, [pc, #56] ; (8000584 ) + 800054a: 781b ldrb r3, [r3, #0] + 800054c: 2b01 cmp r3, #1 + 800054e: d110 bne.n 8000572 + uint8_t payload[3] = { 0x01, HAL_GPIO_ReadPin(GPIOA, + 8000550: 2301 movs r3, #1 + 8000552: 713b strb r3, [r7, #4] + 8000554: 2180 movs r1, #128 ; 0x80 + 8000556: 480e ldr r0, [pc, #56] ; (8000590 ) + 8000558: f000 fce2 bl 8000f20 + 800055c: 4603 mov r3, r0 + 800055e: 717b strb r3, [r7, #5] + 8000560: 23ff movs r3, #255 ; 0xff + 8000562: 71bb strb r3, [r7, #6] + GPIO_PIN_7), 0xFF }; + HAL_UART_Transmit(&huart2, payload, 3, 1500); + 8000564: 1d39 adds r1, r7, #4 + 8000566: f240 53dc movw r3, #1500 ; 0x5dc + 800056a: 2203 movs r2, #3 + 800056c: 4807 ldr r0, [pc, #28] ; (800058c ) + 800056e: f001 f9ee bl 800194e + } + } + uart_index = 0; + 8000572: 4b05 ldr r3, [pc, #20] ; (8000588 ) + 8000574: 2200 movs r2, #0 + 8000576: 701a strb r2, [r3, #0] + memset(uart_buffer, 0, 10); + 8000578: 220a movs r2, #10 + 800057a: 2100 movs r1, #0 + 800057c: 4801 ldr r0, [pc, #4] ; (8000584 ) + 800057e: f001 fdfd bl 800217c + if (HAL_UART_Receive(&huart2, uart_buffer + uart_index, 1, 250) + 8000582: e7b7 b.n 80004f4 + 8000584: 2000006c .word 0x2000006c + 8000588: 20000076 .word 0x20000076 + 800058c: 20000028 .word 0x20000028 + 8000590: 40020000 .word 0x40020000 + +08000594 : /** * @brief System Clock Configuration * @retval None */ void SystemClock_Config(void) { - 800050c: b580 push {r7, lr} - 800050e: b094 sub sp, #80 ; 0x50 - 8000510: af00 add r7, sp, #0 + 8000594: b580 push {r7, lr} + 8000596: b094 sub sp, #80 ; 0x50 + 8000598: af00 add r7, sp, #0 RCC_OscInitTypeDef RCC_OscInitStruct = { 0 }; - 8000512: f107 0320 add.w r3, r7, #32 - 8000516: 2230 movs r2, #48 ; 0x30 - 8000518: 2100 movs r1, #0 - 800051a: 4618 mov r0, r3 - 800051c: f001 fd30 bl 8001f80 + 800059a: f107 0320 add.w r3, r7, #32 + 800059e: 2230 movs r2, #48 ; 0x30 + 80005a0: 2100 movs r1, #0 + 80005a2: 4618 mov r0, r3 + 80005a4: f001 fdea bl 800217c RCC_ClkInitTypeDef RCC_ClkInitStruct = { 0 }; - 8000520: f107 030c add.w r3, r7, #12 - 8000524: 2200 movs r2, #0 - 8000526: 601a str r2, [r3, #0] - 8000528: 605a str r2, [r3, #4] - 800052a: 609a str r2, [r3, #8] - 800052c: 60da str r2, [r3, #12] - 800052e: 611a str r2, [r3, #16] + 80005a8: f107 030c add.w r3, r7, #12 + 80005ac: 2200 movs r2, #0 + 80005ae: 601a str r2, [r3, #0] + 80005b0: 605a str r2, [r3, #4] + 80005b2: 609a str r2, [r3, #8] + 80005b4: 60da str r2, [r3, #12] + 80005b6: 611a str r2, [r3, #16] /** Configure the main internal regulator output voltage */ __HAL_RCC_PWR_CLK_ENABLE(); - 8000530: 2300 movs r3, #0 - 8000532: 60bb str r3, [r7, #8] - 8000534: 4b28 ldr r3, [pc, #160] ; (80005d8 ) - 8000536: 6c1b ldr r3, [r3, #64] ; 0x40 - 8000538: 4a27 ldr r2, [pc, #156] ; (80005d8 ) - 800053a: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000 - 800053e: 6413 str r3, [r2, #64] ; 0x40 - 8000540: 4b25 ldr r3, [pc, #148] ; (80005d8 ) - 8000542: 6c1b ldr r3, [r3, #64] ; 0x40 - 8000544: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 - 8000548: 60bb str r3, [r7, #8] - 800054a: 68bb ldr r3, [r7, #8] + 80005b8: 2300 movs r3, #0 + 80005ba: 60bb str r3, [r7, #8] + 80005bc: 4b28 ldr r3, [pc, #160] ; (8000660 ) + 80005be: 6c1b ldr r3, [r3, #64] ; 0x40 + 80005c0: 4a27 ldr r2, [pc, #156] ; (8000660 ) + 80005c2: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000 + 80005c6: 6413 str r3, [r2, #64] ; 0x40 + 80005c8: 4b25 ldr r3, [pc, #148] ; (8000660 ) + 80005ca: 6c1b ldr r3, [r3, #64] ; 0x40 + 80005cc: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 + 80005d0: 60bb str r3, [r7, #8] + 80005d2: 68bb ldr r3, [r7, #8] __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); - 800054c: 2300 movs r3, #0 - 800054e: 607b str r3, [r7, #4] - 8000550: 4b22 ldr r3, [pc, #136] ; (80005dc ) - 8000552: 681b ldr r3, [r3, #0] - 8000554: 4a21 ldr r2, [pc, #132] ; (80005dc ) - 8000556: f443 4340 orr.w r3, r3, #49152 ; 0xc000 - 800055a: 6013 str r3, [r2, #0] - 800055c: 4b1f ldr r3, [pc, #124] ; (80005dc ) - 800055e: 681b ldr r3, [r3, #0] - 8000560: f403 4340 and.w r3, r3, #49152 ; 0xc000 - 8000564: 607b str r3, [r7, #4] - 8000566: 687b ldr r3, [r7, #4] + 80005d4: 2300 movs r3, #0 + 80005d6: 607b str r3, [r7, #4] + 80005d8: 4b22 ldr r3, [pc, #136] ; (8000664 ) + 80005da: 681b ldr r3, [r3, #0] + 80005dc: 4a21 ldr r2, [pc, #132] ; (8000664 ) + 80005de: f443 4340 orr.w r3, r3, #49152 ; 0xc000 + 80005e2: 6013 str r3, [r2, #0] + 80005e4: 4b1f ldr r3, [pc, #124] ; (8000664 ) + 80005e6: 681b ldr r3, [r3, #0] + 80005e8: f403 4340 and.w r3, r3, #49152 ; 0xc000 + 80005ec: 607b str r3, [r7, #4] + 80005ee: 687b ldr r3, [r7, #4] /** Initializes the RCC Oscillators according to the specified parameters * in the RCC_OscInitTypeDef structure. */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; - 8000568: 2302 movs r3, #2 - 800056a: 623b str r3, [r7, #32] + 80005f0: 2302 movs r3, #2 + 80005f2: 623b str r3, [r7, #32] RCC_OscInitStruct.HSIState = RCC_HSI_ON; - 800056c: 2301 movs r3, #1 - 800056e: 62fb str r3, [r7, #44] ; 0x2c + 80005f4: 2301 movs r3, #1 + 80005f6: 62fb str r3, [r7, #44] ; 0x2c RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; - 8000570: 2310 movs r3, #16 - 8000572: 633b str r3, [r7, #48] ; 0x30 + 80005f8: 2310 movs r3, #16 + 80005fa: 633b str r3, [r7, #48] ; 0x30 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; - 8000574: 2302 movs r3, #2 - 8000576: 63bb str r3, [r7, #56] ; 0x38 + 80005fc: 2302 movs r3, #2 + 80005fe: 63bb str r3, [r7, #56] ; 0x38 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; - 8000578: 2300 movs r3, #0 - 800057a: 63fb str r3, [r7, #60] ; 0x3c + 8000600: 2300 movs r3, #0 + 8000602: 63fb str r3, [r7, #60] ; 0x3c RCC_OscInitStruct.PLL.PLLM = 16; - 800057c: 2310 movs r3, #16 - 800057e: 643b str r3, [r7, #64] ; 0x40 + 8000604: 2310 movs r3, #16 + 8000606: 643b str r3, [r7, #64] ; 0x40 RCC_OscInitStruct.PLL.PLLN = 336; - 8000580: f44f 73a8 mov.w r3, #336 ; 0x150 - 8000584: 647b str r3, [r7, #68] ; 0x44 + 8000608: f44f 73a8 mov.w r3, #336 ; 0x150 + 800060c: 647b str r3, [r7, #68] ; 0x44 RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4; - 8000586: 2304 movs r3, #4 - 8000588: 64bb str r3, [r7, #72] ; 0x48 + 800060e: 2304 movs r3, #4 + 8000610: 64bb str r3, [r7, #72] ; 0x48 RCC_OscInitStruct.PLL.PLLQ = 4; - 800058a: 2304 movs r3, #4 - 800058c: 64fb str r3, [r7, #76] ; 0x4c + 8000612: 2304 movs r3, #4 + 8000614: 64fb str r3, [r7, #76] ; 0x4c if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { - 800058e: f107 0320 add.w r3, r7, #32 - 8000592: 4618 mov r0, r3 - 8000594: f000 fc9a bl 8000ecc - 8000598: 4603 mov r3, r0 - 800059a: 2b00 cmp r3, #0 - 800059c: d001 beq.n 80005a2 + 8000616: f107 0320 add.w r3, r7, #32 + 800061a: 4618 mov r0, r3 + 800061c: f000 fcb2 bl 8000f84 + 8000620: 4603 mov r3, r0 + 8000622: 2b00 cmp r3, #0 + 8000624: d001 beq.n 800062a Error_Handler(); - 800059e: f000 f8c3 bl 8000728 + 8000626: f000 f8c3 bl 80007b0 } /** Initializes the CPU, AHB and APB buses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK - 80005a2: 230f movs r3, #15 - 80005a4: 60fb str r3, [r7, #12] + 800062a: 230f movs r3, #15 + 800062c: 60fb str r3, [r7, #12] | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2; RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; - 80005a6: 2302 movs r3, #2 - 80005a8: 613b str r3, [r7, #16] + 800062e: 2302 movs r3, #2 + 8000630: 613b str r3, [r7, #16] RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; - 80005aa: 2300 movs r3, #0 - 80005ac: 617b str r3, [r7, #20] + 8000632: 2300 movs r3, #0 + 8000634: 617b str r3, [r7, #20] RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; - 80005ae: f44f 5380 mov.w r3, #4096 ; 0x1000 - 80005b2: 61bb str r3, [r7, #24] + 8000636: f44f 5380 mov.w r3, #4096 ; 0x1000 + 800063a: 61bb str r3, [r7, #24] RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; - 80005b4: 2300 movs r3, #0 - 80005b6: 61fb str r3, [r7, #28] + 800063c: 2300 movs r3, #0 + 800063e: 61fb str r3, [r7, #28] if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) { - 80005b8: f107 030c add.w r3, r7, #12 - 80005bc: 2102 movs r1, #2 - 80005be: 4618 mov r0, r3 - 80005c0: f000 fefc bl 80013bc - 80005c4: 4603 mov r3, r0 - 80005c6: 2b00 cmp r3, #0 - 80005c8: d001 beq.n 80005ce + 8000640: f107 030c add.w r3, r7, #12 + 8000644: 2102 movs r1, #2 + 8000646: 4618 mov r0, r3 + 8000648: f000 ff14 bl 8001474 + 800064c: 4603 mov r3, r0 + 800064e: 2b00 cmp r3, #0 + 8000650: d001 beq.n 8000656 Error_Handler(); - 80005ca: f000 f8ad bl 8000728 + 8000652: f000 f8ad bl 80007b0 } } - 80005ce: bf00 nop - 80005d0: 3750 adds r7, #80 ; 0x50 - 80005d2: 46bd mov sp, r7 - 80005d4: bd80 pop {r7, pc} - 80005d6: bf00 nop - 80005d8: 40023800 .word 0x40023800 - 80005dc: 40007000 .word 0x40007000 + 8000656: bf00 nop + 8000658: 3750 adds r7, #80 ; 0x50 + 800065a: 46bd mov sp, r7 + 800065c: bd80 pop {r7, pc} + 800065e: bf00 nop + 8000660: 40023800 .word 0x40023800 + 8000664: 40007000 .word 0x40007000 -080005e0 : +08000668 : /** * @brief USART2 Initialization Function * @param None * @retval None */ static void MX_USART2_UART_Init(void) { - 80005e0: b580 push {r7, lr} - 80005e2: af00 add r7, sp, #0 + 8000668: b580 push {r7, lr} + 800066a: af00 add r7, sp, #0 /* USER CODE END USART2_Init 0 */ /* USER CODE BEGIN USART2_Init 1 */ /* USER CODE END USART2_Init 1 */ huart2.Instance = USART2; - 80005e4: 4b11 ldr r3, [pc, #68] ; (800062c ) - 80005e6: 4a12 ldr r2, [pc, #72] ; (8000630 ) - 80005e8: 601a str r2, [r3, #0] + 800066c: 4b11 ldr r3, [pc, #68] ; (80006b4 ) + 800066e: 4a12 ldr r2, [pc, #72] ; (80006b8 ) + 8000670: 601a str r2, [r3, #0] huart2.Init.BaudRate = 115200; - 80005ea: 4b10 ldr r3, [pc, #64] ; (800062c ) - 80005ec: f44f 32e1 mov.w r2, #115200 ; 0x1c200 - 80005f0: 605a str r2, [r3, #4] + 8000672: 4b10 ldr r3, [pc, #64] ; (80006b4 ) + 8000674: f44f 32e1 mov.w r2, #115200 ; 0x1c200 + 8000678: 605a str r2, [r3, #4] huart2.Init.WordLength = UART_WORDLENGTH_8B; - 80005f2: 4b0e ldr r3, [pc, #56] ; (800062c ) - 80005f4: 2200 movs r2, #0 - 80005f6: 609a str r2, [r3, #8] + 800067a: 4b0e ldr r3, [pc, #56] ; (80006b4 ) + 800067c: 2200 movs r2, #0 + 800067e: 609a str r2, [r3, #8] huart2.Init.StopBits = UART_STOPBITS_1; - 80005f8: 4b0c ldr r3, [pc, #48] ; (800062c ) - 80005fa: 2200 movs r2, #0 - 80005fc: 60da str r2, [r3, #12] + 8000680: 4b0c ldr r3, [pc, #48] ; (80006b4 ) + 8000682: 2200 movs r2, #0 + 8000684: 60da str r2, [r3, #12] huart2.Init.Parity = UART_PARITY_NONE; - 80005fe: 4b0b ldr r3, [pc, #44] ; (800062c ) - 8000600: 2200 movs r2, #0 - 8000602: 611a str r2, [r3, #16] + 8000686: 4b0b ldr r3, [pc, #44] ; (80006b4 ) + 8000688: 2200 movs r2, #0 + 800068a: 611a str r2, [r3, #16] huart2.Init.Mode = UART_MODE_TX_RX; - 8000604: 4b09 ldr r3, [pc, #36] ; (800062c ) - 8000606: 220c movs r2, #12 - 8000608: 615a str r2, [r3, #20] + 800068c: 4b09 ldr r3, [pc, #36] ; (80006b4 ) + 800068e: 220c movs r2, #12 + 8000690: 615a str r2, [r3, #20] huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE; - 800060a: 4b08 ldr r3, [pc, #32] ; (800062c ) - 800060c: 2200 movs r2, #0 - 800060e: 619a str r2, [r3, #24] + 8000692: 4b08 ldr r3, [pc, #32] ; (80006b4 ) + 8000694: 2200 movs r2, #0 + 8000696: 619a str r2, [r3, #24] huart2.Init.OverSampling = UART_OVERSAMPLING_16; - 8000610: 4b06 ldr r3, [pc, #24] ; (800062c ) - 8000612: 2200 movs r2, #0 - 8000614: 61da str r2, [r3, #28] + 8000698: 4b06 ldr r3, [pc, #24] ; (80006b4 ) + 800069a: 2200 movs r2, #0 + 800069c: 61da str r2, [r3, #28] if (HAL_UART_Init(&huart2) != HAL_OK) { - 8000616: 4805 ldr r0, [pc, #20] ; (800062c ) - 8000618: f001 f8f0 bl 80017fc - 800061c: 4603 mov r3, r0 - 800061e: 2b00 cmp r3, #0 - 8000620: d001 beq.n 8000626 + 800069e: 4805 ldr r0, [pc, #20] ; (80006b4 ) + 80006a0: f001 f908 bl 80018b4 + 80006a4: 4603 mov r3, r0 + 80006a6: 2b00 cmp r3, #0 + 80006a8: d001 beq.n 80006ae Error_Handler(); - 8000622: f000 f881 bl 8000728 + 80006aa: f000 f881 bl 80007b0 } /* USER CODE BEGIN USART2_Init 2 */ /* USER CODE END USART2_Init 2 */ } - 8000626: bf00 nop - 8000628: bd80 pop {r7, pc} - 800062a: bf00 nop - 800062c: 20000028 .word 0x20000028 - 8000630: 40004400 .word 0x40004400 + 80006ae: bf00 nop + 80006b0: bd80 pop {r7, pc} + 80006b2: bf00 nop + 80006b4: 20000028 .word 0x20000028 + 80006b8: 40004400 .word 0x40004400 -08000634 : +080006bc : /** * @brief GPIO Initialization Function * @param None * @retval None */ static void MX_GPIO_Init(void) { - 8000634: b580 push {r7, lr} - 8000636: b08a sub sp, #40 ; 0x28 - 8000638: af00 add r7, sp, #0 + 80006bc: b580 push {r7, lr} + 80006be: b08a sub sp, #40 ; 0x28 + 80006c0: af00 add r7, sp, #0 GPIO_InitTypeDef GPIO_InitStruct = { 0 }; - 800063a: f107 0314 add.w r3, r7, #20 - 800063e: 2200 movs r2, #0 - 8000640: 601a str r2, [r3, #0] - 8000642: 605a str r2, [r3, #4] - 8000644: 609a str r2, [r3, #8] - 8000646: 60da str r2, [r3, #12] - 8000648: 611a str r2, [r3, #16] + 80006c2: f107 0314 add.w r3, r7, #20 + 80006c6: 2200 movs r2, #0 + 80006c8: 601a str r2, [r3, #0] + 80006ca: 605a str r2, [r3, #4] + 80006cc: 609a str r2, [r3, #8] + 80006ce: 60da str r2, [r3, #12] + 80006d0: 611a str r2, [r3, #16] /* USER CODE BEGIN MX_GPIO_Init_1 */ /* USER CODE END MX_GPIO_Init_1 */ /* GPIO Ports Clock Enable */ __HAL_RCC_GPIOC_CLK_ENABLE(); - 800064a: 2300 movs r3, #0 - 800064c: 613b str r3, [r7, #16] - 800064e: 4b33 ldr r3, [pc, #204] ; (800071c ) - 8000650: 6b1b ldr r3, [r3, #48] ; 0x30 - 8000652: 4a32 ldr r2, [pc, #200] ; (800071c ) - 8000654: f043 0304 orr.w r3, r3, #4 - 8000658: 6313 str r3, [r2, #48] ; 0x30 - 800065a: 4b30 ldr r3, [pc, #192] ; (800071c ) - 800065c: 6b1b ldr r3, [r3, #48] ; 0x30 - 800065e: f003 0304 and.w r3, r3, #4 - 8000662: 613b str r3, [r7, #16] - 8000664: 693b ldr r3, [r7, #16] + 80006d2: 2300 movs r3, #0 + 80006d4: 613b str r3, [r7, #16] + 80006d6: 4b33 ldr r3, [pc, #204] ; (80007a4 ) + 80006d8: 6b1b ldr r3, [r3, #48] ; 0x30 + 80006da: 4a32 ldr r2, [pc, #200] ; (80007a4 ) + 80006dc: f043 0304 orr.w r3, r3, #4 + 80006e0: 6313 str r3, [r2, #48] ; 0x30 + 80006e2: 4b30 ldr r3, [pc, #192] ; (80007a4 ) + 80006e4: 6b1b ldr r3, [r3, #48] ; 0x30 + 80006e6: f003 0304 and.w r3, r3, #4 + 80006ea: 613b str r3, [r7, #16] + 80006ec: 693b ldr r3, [r7, #16] __HAL_RCC_GPIOH_CLK_ENABLE(); - 8000666: 2300 movs r3, #0 - 8000668: 60fb str r3, [r7, #12] - 800066a: 4b2c ldr r3, [pc, #176] ; (800071c ) - 800066c: 6b1b ldr r3, [r3, #48] ; 0x30 - 800066e: 4a2b ldr r2, [pc, #172] ; (800071c ) - 8000670: f043 0380 orr.w r3, r3, #128 ; 0x80 - 8000674: 6313 str r3, [r2, #48] ; 0x30 - 8000676: 4b29 ldr r3, [pc, #164] ; (800071c ) - 8000678: 6b1b ldr r3, [r3, #48] ; 0x30 - 800067a: f003 0380 and.w r3, r3, #128 ; 0x80 - 800067e: 60fb str r3, [r7, #12] - 8000680: 68fb ldr r3, [r7, #12] + 80006ee: 2300 movs r3, #0 + 80006f0: 60fb str r3, [r7, #12] + 80006f2: 4b2c ldr r3, [pc, #176] ; (80007a4 ) + 80006f4: 6b1b ldr r3, [r3, #48] ; 0x30 + 80006f6: 4a2b ldr r2, [pc, #172] ; (80007a4 ) + 80006f8: f043 0380 orr.w r3, r3, #128 ; 0x80 + 80006fc: 6313 str r3, [r2, #48] ; 0x30 + 80006fe: 4b29 ldr r3, [pc, #164] ; (80007a4 ) + 8000700: 6b1b ldr r3, [r3, #48] ; 0x30 + 8000702: f003 0380 and.w r3, r3, #128 ; 0x80 + 8000706: 60fb str r3, [r7, #12] + 8000708: 68fb ldr r3, [r7, #12] __HAL_RCC_GPIOA_CLK_ENABLE(); - 8000682: 2300 movs r3, #0 - 8000684: 60bb str r3, [r7, #8] - 8000686: 4b25 ldr r3, [pc, #148] ; (800071c ) - 8000688: 6b1b ldr r3, [r3, #48] ; 0x30 - 800068a: 4a24 ldr r2, [pc, #144] ; (800071c ) - 800068c: f043 0301 orr.w r3, r3, #1 - 8000690: 6313 str r3, [r2, #48] ; 0x30 - 8000692: 4b22 ldr r3, [pc, #136] ; (800071c ) - 8000694: 6b1b ldr r3, [r3, #48] ; 0x30 - 8000696: f003 0301 and.w r3, r3, #1 - 800069a: 60bb str r3, [r7, #8] - 800069c: 68bb ldr r3, [r7, #8] + 800070a: 2300 movs r3, #0 + 800070c: 60bb str r3, [r7, #8] + 800070e: 4b25 ldr r3, [pc, #148] ; (80007a4 ) + 8000710: 6b1b ldr r3, [r3, #48] ; 0x30 + 8000712: 4a24 ldr r2, [pc, #144] ; (80007a4 ) + 8000714: f043 0301 orr.w r3, r3, #1 + 8000718: 6313 str r3, [r2, #48] ; 0x30 + 800071a: 4b22 ldr r3, [pc, #136] ; (80007a4 ) + 800071c: 6b1b ldr r3, [r3, #48] ; 0x30 + 800071e: f003 0301 and.w r3, r3, #1 + 8000722: 60bb str r3, [r7, #8] + 8000724: 68bb ldr r3, [r7, #8] __HAL_RCC_GPIOB_CLK_ENABLE(); - 800069e: 2300 movs r3, #0 - 80006a0: 607b str r3, [r7, #4] - 80006a2: 4b1e ldr r3, [pc, #120] ; (800071c ) - 80006a4: 6b1b ldr r3, [r3, #48] ; 0x30 - 80006a6: 4a1d ldr r2, [pc, #116] ; (800071c ) - 80006a8: f043 0302 orr.w r3, r3, #2 - 80006ac: 6313 str r3, [r2, #48] ; 0x30 - 80006ae: 4b1b ldr r3, [pc, #108] ; (800071c ) - 80006b0: 6b1b ldr r3, [r3, #48] ; 0x30 - 80006b2: f003 0302 and.w r3, r3, #2 - 80006b6: 607b str r3, [r7, #4] - 80006b8: 687b ldr r3, [r7, #4] + 8000726: 2300 movs r3, #0 + 8000728: 607b str r3, [r7, #4] + 800072a: 4b1e ldr r3, [pc, #120] ; (80007a4 ) + 800072c: 6b1b ldr r3, [r3, #48] ; 0x30 + 800072e: 4a1d ldr r2, [pc, #116] ; (80007a4 ) + 8000730: f043 0302 orr.w r3, r3, #2 + 8000734: 6313 str r3, [r2, #48] ; 0x30 + 8000736: 4b1b ldr r3, [pc, #108] ; (80007a4 ) + 8000738: 6b1b ldr r3, [r3, #48] ; 0x30 + 800073a: f003 0302 and.w r3, r3, #2 + 800073e: 607b str r3, [r7, #4] + 8000740: 687b ldr r3, [r7, #4] /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(LD2_GPIO_Port, LD2_Pin, GPIO_PIN_RESET); - 80006ba: 2200 movs r2, #0 - 80006bc: 2120 movs r1, #32 - 80006be: 4818 ldr r0, [pc, #96] ; (8000720 ) - 80006c0: f000 fbea bl 8000e98 + 8000742: 2200 movs r2, #0 + 8000744: 2120 movs r1, #32 + 8000746: 4818 ldr r0, [pc, #96] ; (80007a8 ) + 8000748: f000 fc02 bl 8000f50 /*Configure GPIO pin : B1_Pin */ GPIO_InitStruct.Pin = B1_Pin; - 80006c4: f44f 5300 mov.w r3, #8192 ; 0x2000 - 80006c8: 617b str r3, [r7, #20] + 800074c: f44f 5300 mov.w r3, #8192 ; 0x2000 + 8000750: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_IT_FALLING; - 80006ca: f44f 1304 mov.w r3, #2162688 ; 0x210000 - 80006ce: 61bb str r3, [r7, #24] + 8000752: f44f 1304 mov.w r3, #2162688 ; 0x210000 + 8000756: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; - 80006d0: 2300 movs r3, #0 - 80006d2: 61fb str r3, [r7, #28] + 8000758: 2300 movs r3, #0 + 800075a: 61fb str r3, [r7, #28] HAL_GPIO_Init(B1_GPIO_Port, &GPIO_InitStruct); - 80006d4: f107 0314 add.w r3, r7, #20 - 80006d8: 4619 mov r1, r3 - 80006da: 4812 ldr r0, [pc, #72] ; (8000724 ) - 80006dc: f000 fa58 bl 8000b90 + 800075c: f107 0314 add.w r3, r7, #20 + 8000760: 4619 mov r1, r3 + 8000762: 4812 ldr r0, [pc, #72] ; (80007ac ) + 8000764: f000 fa58 bl 8000c18 /*Configure GPIO pin : LD2_Pin */ GPIO_InitStruct.Pin = LD2_Pin; - 80006e0: 2320 movs r3, #32 - 80006e2: 617b str r3, [r7, #20] + 8000768: 2320 movs r3, #32 + 800076a: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; - 80006e4: 2301 movs r3, #1 - 80006e6: 61bb str r3, [r7, #24] + 800076c: 2301 movs r3, #1 + 800076e: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; - 80006e8: 2300 movs r3, #0 - 80006ea: 61fb str r3, [r7, #28] + 8000770: 2300 movs r3, #0 + 8000772: 61fb str r3, [r7, #28] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 80006ec: 2300 movs r3, #0 - 80006ee: 623b str r3, [r7, #32] + 8000774: 2300 movs r3, #0 + 8000776: 623b str r3, [r7, #32] HAL_GPIO_Init(LD2_GPIO_Port, &GPIO_InitStruct); - 80006f0: f107 0314 add.w r3, r7, #20 - 80006f4: 4619 mov r1, r3 - 80006f6: 480a ldr r0, [pc, #40] ; (8000720 ) - 80006f8: f000 fa4a bl 8000b90 + 8000778: f107 0314 add.w r3, r7, #20 + 800077c: 4619 mov r1, r3 + 800077e: 480a ldr r0, [pc, #40] ; (80007a8 ) + 8000780: f000 fa4a bl 8000c18 /*Configure GPIO pin : Door_Sensor_Pin */ GPIO_InitStruct.Pin = Door_Sensor_Pin; - 80006fc: 2380 movs r3, #128 ; 0x80 - 80006fe: 617b str r3, [r7, #20] + 8000784: 2380 movs r3, #128 ; 0x80 + 8000786: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; - 8000700: 2300 movs r3, #0 - 8000702: 61bb str r3, [r7, #24] + 8000788: 2300 movs r3, #0 + 800078a: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_PULLUP; - 8000704: 2301 movs r3, #1 - 8000706: 61fb str r3, [r7, #28] + 800078c: 2301 movs r3, #1 + 800078e: 61fb str r3, [r7, #28] HAL_GPIO_Init(Door_Sensor_GPIO_Port, &GPIO_InitStruct); - 8000708: f107 0314 add.w r3, r7, #20 - 800070c: 4619 mov r1, r3 - 800070e: 4804 ldr r0, [pc, #16] ; (8000720 ) - 8000710: f000 fa3e bl 8000b90 + 8000790: f107 0314 add.w r3, r7, #20 + 8000794: 4619 mov r1, r3 + 8000796: 4804 ldr r0, [pc, #16] ; (80007a8 ) + 8000798: f000 fa3e bl 8000c18 /* USER CODE BEGIN MX_GPIO_Init_2 */ /* USER CODE END MX_GPIO_Init_2 */ } - 8000714: bf00 nop - 8000716: 3728 adds r7, #40 ; 0x28 - 8000718: 46bd mov sp, r7 - 800071a: bd80 pop {r7, pc} - 800071c: 40023800 .word 0x40023800 - 8000720: 40020000 .word 0x40020000 - 8000724: 40020800 .word 0x40020800 + 800079c: bf00 nop + 800079e: 3728 adds r7, #40 ; 0x28 + 80007a0: 46bd mov sp, r7 + 80007a2: bd80 pop {r7, pc} + 80007a4: 40023800 .word 0x40023800 + 80007a8: 40020000 .word 0x40020000 + 80007ac: 40020800 .word 0x40020800 -08000728 : +080007b0 : /** * @brief This function is executed in case of error occurrence. * @retval None */ void Error_Handler(void) { - 8000728: b480 push {r7} - 800072a: af00 add r7, sp, #0 + 80007b0: b480 push {r7} + 80007b2: af00 add r7, sp, #0 \details Disables IRQ interrupts by setting the I-bit in the CPSR. Can only be executed in Privileged modes. */ __STATIC_FORCEINLINE void __disable_irq(void) { __ASM volatile ("cpsid i" : : : "memory"); - 800072c: b672 cpsid i + 80007b4: b672 cpsid i } - 800072e: bf00 nop + 80007b6: bf00 nop /* USER CODE BEGIN Error_Handler_Debug */ /* User can add his own implementation to report the HAL error return state */ __disable_irq(); while (1) { - 8000730: e7fe b.n 8000730 + 80007b8: e7fe b.n 80007b8 ... -08000734 : +080007bc : /* USER CODE END 0 */ /** * Initializes the Global MSP. */ void HAL_MspInit(void) { - 8000734: b580 push {r7, lr} - 8000736: b082 sub sp, #8 - 8000738: af00 add r7, sp, #0 + 80007bc: b580 push {r7, lr} + 80007be: b082 sub sp, #8 + 80007c0: af00 add r7, sp, #0 /* USER CODE BEGIN MspInit 0 */ /* USER CODE END MspInit 0 */ __HAL_RCC_SYSCFG_CLK_ENABLE(); - 800073a: 2300 movs r3, #0 - 800073c: 607b str r3, [r7, #4] - 800073e: 4b10 ldr r3, [pc, #64] ; (8000780 ) - 8000740: 6c5b ldr r3, [r3, #68] ; 0x44 - 8000742: 4a0f ldr r2, [pc, #60] ; (8000780 ) - 8000744: f443 4380 orr.w r3, r3, #16384 ; 0x4000 - 8000748: 6453 str r3, [r2, #68] ; 0x44 - 800074a: 4b0d ldr r3, [pc, #52] ; (8000780 ) - 800074c: 6c5b ldr r3, [r3, #68] ; 0x44 - 800074e: f403 4380 and.w r3, r3, #16384 ; 0x4000 - 8000752: 607b str r3, [r7, #4] - 8000754: 687b ldr r3, [r7, #4] + 80007c2: 2300 movs r3, #0 + 80007c4: 607b str r3, [r7, #4] + 80007c6: 4b10 ldr r3, [pc, #64] ; (8000808 ) + 80007c8: 6c5b ldr r3, [r3, #68] ; 0x44 + 80007ca: 4a0f ldr r2, [pc, #60] ; (8000808 ) + 80007cc: f443 4380 orr.w r3, r3, #16384 ; 0x4000 + 80007d0: 6453 str r3, [r2, #68] ; 0x44 + 80007d2: 4b0d ldr r3, [pc, #52] ; (8000808 ) + 80007d4: 6c5b ldr r3, [r3, #68] ; 0x44 + 80007d6: f403 4380 and.w r3, r3, #16384 ; 0x4000 + 80007da: 607b str r3, [r7, #4] + 80007dc: 687b ldr r3, [r7, #4] __HAL_RCC_PWR_CLK_ENABLE(); - 8000756: 2300 movs r3, #0 - 8000758: 603b str r3, [r7, #0] - 800075a: 4b09 ldr r3, [pc, #36] ; (8000780 ) - 800075c: 6c1b ldr r3, [r3, #64] ; 0x40 - 800075e: 4a08 ldr r2, [pc, #32] ; (8000780 ) - 8000760: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000 - 8000764: 6413 str r3, [r2, #64] ; 0x40 - 8000766: 4b06 ldr r3, [pc, #24] ; (8000780 ) - 8000768: 6c1b ldr r3, [r3, #64] ; 0x40 - 800076a: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 - 800076e: 603b str r3, [r7, #0] - 8000770: 683b ldr r3, [r7, #0] + 80007de: 2300 movs r3, #0 + 80007e0: 603b str r3, [r7, #0] + 80007e2: 4b09 ldr r3, [pc, #36] ; (8000808 ) + 80007e4: 6c1b ldr r3, [r3, #64] ; 0x40 + 80007e6: 4a08 ldr r2, [pc, #32] ; (8000808 ) + 80007e8: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000 + 80007ec: 6413 str r3, [r2, #64] ; 0x40 + 80007ee: 4b06 ldr r3, [pc, #24] ; (8000808 ) + 80007f0: 6c1b ldr r3, [r3, #64] ; 0x40 + 80007f2: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 + 80007f6: 603b str r3, [r7, #0] + 80007f8: 683b ldr r3, [r7, #0] HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_0); - 8000772: 2007 movs r0, #7 - 8000774: f000 f9d8 bl 8000b28 + 80007fa: 2007 movs r0, #7 + 80007fc: f000 f9d8 bl 8000bb0 /* System interrupt init*/ /* USER CODE BEGIN MspInit 1 */ /* USER CODE END MspInit 1 */ } - 8000778: bf00 nop - 800077a: 3708 adds r7, #8 - 800077c: 46bd mov sp, r7 - 800077e: bd80 pop {r7, pc} - 8000780: 40023800 .word 0x40023800 + 8000800: bf00 nop + 8000802: 3708 adds r7, #8 + 8000804: 46bd mov sp, r7 + 8000806: bd80 pop {r7, pc} + 8000808: 40023800 .word 0x40023800 -08000784 : +0800080c : * This function configures the hardware resources used in this example * @param huart: UART handle pointer * @retval None */ void HAL_UART_MspInit(UART_HandleTypeDef* huart) { - 8000784: b580 push {r7, lr} - 8000786: b08a sub sp, #40 ; 0x28 - 8000788: af00 add r7, sp, #0 - 800078a: 6078 str r0, [r7, #4] + 800080c: b580 push {r7, lr} + 800080e: b08a sub sp, #40 ; 0x28 + 8000810: af00 add r7, sp, #0 + 8000812: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; - 800078c: f107 0314 add.w r3, r7, #20 - 8000790: 2200 movs r2, #0 - 8000792: 601a str r2, [r3, #0] - 8000794: 605a str r2, [r3, #4] - 8000796: 609a str r2, [r3, #8] - 8000798: 60da str r2, [r3, #12] - 800079a: 611a str r2, [r3, #16] + 8000814: f107 0314 add.w r3, r7, #20 + 8000818: 2200 movs r2, #0 + 800081a: 601a str r2, [r3, #0] + 800081c: 605a str r2, [r3, #4] + 800081e: 609a str r2, [r3, #8] + 8000820: 60da str r2, [r3, #12] + 8000822: 611a str r2, [r3, #16] if(huart->Instance==USART2) - 800079c: 687b ldr r3, [r7, #4] - 800079e: 681b ldr r3, [r3, #0] - 80007a0: 4a19 ldr r2, [pc, #100] ; (8000808 ) - 80007a2: 4293 cmp r3, r2 - 80007a4: d12b bne.n 80007fe + 8000824: 687b ldr r3, [r7, #4] + 8000826: 681b ldr r3, [r3, #0] + 8000828: 4a19 ldr r2, [pc, #100] ; (8000890 ) + 800082a: 4293 cmp r3, r2 + 800082c: d12b bne.n 8000886 { /* USER CODE BEGIN USART2_MspInit 0 */ /* USER CODE END USART2_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_USART2_CLK_ENABLE(); - 80007a6: 2300 movs r3, #0 - 80007a8: 613b str r3, [r7, #16] - 80007aa: 4b18 ldr r3, [pc, #96] ; (800080c ) - 80007ac: 6c1b ldr r3, [r3, #64] ; 0x40 - 80007ae: 4a17 ldr r2, [pc, #92] ; (800080c ) - 80007b0: f443 3300 orr.w r3, r3, #131072 ; 0x20000 - 80007b4: 6413 str r3, [r2, #64] ; 0x40 - 80007b6: 4b15 ldr r3, [pc, #84] ; (800080c ) - 80007b8: 6c1b ldr r3, [r3, #64] ; 0x40 - 80007ba: f403 3300 and.w r3, r3, #131072 ; 0x20000 - 80007be: 613b str r3, [r7, #16] - 80007c0: 693b ldr r3, [r7, #16] + 800082e: 2300 movs r3, #0 + 8000830: 613b str r3, [r7, #16] + 8000832: 4b18 ldr r3, [pc, #96] ; (8000894 ) + 8000834: 6c1b ldr r3, [r3, #64] ; 0x40 + 8000836: 4a17 ldr r2, [pc, #92] ; (8000894 ) + 8000838: f443 3300 orr.w r3, r3, #131072 ; 0x20000 + 800083c: 6413 str r3, [r2, #64] ; 0x40 + 800083e: 4b15 ldr r3, [pc, #84] ; (8000894 ) + 8000840: 6c1b ldr r3, [r3, #64] ; 0x40 + 8000842: f403 3300 and.w r3, r3, #131072 ; 0x20000 + 8000846: 613b str r3, [r7, #16] + 8000848: 693b ldr r3, [r7, #16] __HAL_RCC_GPIOA_CLK_ENABLE(); - 80007c2: 2300 movs r3, #0 - 80007c4: 60fb str r3, [r7, #12] - 80007c6: 4b11 ldr r3, [pc, #68] ; (800080c ) - 80007c8: 6b1b ldr r3, [r3, #48] ; 0x30 - 80007ca: 4a10 ldr r2, [pc, #64] ; (800080c ) - 80007cc: f043 0301 orr.w r3, r3, #1 - 80007d0: 6313 str r3, [r2, #48] ; 0x30 - 80007d2: 4b0e ldr r3, [pc, #56] ; (800080c ) - 80007d4: 6b1b ldr r3, [r3, #48] ; 0x30 - 80007d6: f003 0301 and.w r3, r3, #1 - 80007da: 60fb str r3, [r7, #12] - 80007dc: 68fb ldr r3, [r7, #12] + 800084a: 2300 movs r3, #0 + 800084c: 60fb str r3, [r7, #12] + 800084e: 4b11 ldr r3, [pc, #68] ; (8000894 ) + 8000850: 6b1b ldr r3, [r3, #48] ; 0x30 + 8000852: 4a10 ldr r2, [pc, #64] ; (8000894 ) + 8000854: f043 0301 orr.w r3, r3, #1 + 8000858: 6313 str r3, [r2, #48] ; 0x30 + 800085a: 4b0e ldr r3, [pc, #56] ; (8000894 ) + 800085c: 6b1b ldr r3, [r3, #48] ; 0x30 + 800085e: f003 0301 and.w r3, r3, #1 + 8000862: 60fb str r3, [r7, #12] + 8000864: 68fb ldr r3, [r7, #12] /**USART2 GPIO Configuration PA2 ------> USART2_TX PA3 ------> USART2_RX */ GPIO_InitStruct.Pin = USART_TX_Pin|USART_RX_Pin; - 80007de: 230c movs r3, #12 - 80007e0: 617b str r3, [r7, #20] + 8000866: 230c movs r3, #12 + 8000868: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - 80007e2: 2302 movs r3, #2 - 80007e4: 61bb str r3, [r7, #24] + 800086a: 2302 movs r3, #2 + 800086c: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; - 80007e6: 2300 movs r3, #0 - 80007e8: 61fb str r3, [r7, #28] + 800086e: 2300 movs r3, #0 + 8000870: 61fb str r3, [r7, #28] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; - 80007ea: 2303 movs r3, #3 - 80007ec: 623b str r3, [r7, #32] + 8000872: 2303 movs r3, #3 + 8000874: 623b str r3, [r7, #32] GPIO_InitStruct.Alternate = GPIO_AF7_USART2; - 80007ee: 2307 movs r3, #7 - 80007f0: 627b str r3, [r7, #36] ; 0x24 + 8000876: 2307 movs r3, #7 + 8000878: 627b str r3, [r7, #36] ; 0x24 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 80007f2: f107 0314 add.w r3, r7, #20 - 80007f6: 4619 mov r1, r3 - 80007f8: 4805 ldr r0, [pc, #20] ; (8000810 ) - 80007fa: f000 f9c9 bl 8000b90 + 800087a: f107 0314 add.w r3, r7, #20 + 800087e: 4619 mov r1, r3 + 8000880: 4805 ldr r0, [pc, #20] ; (8000898 ) + 8000882: f000 f9c9 bl 8000c18 /* USER CODE BEGIN USART2_MspInit 1 */ /* USER CODE END USART2_MspInit 1 */ } } - 80007fe: bf00 nop - 8000800: 3728 adds r7, #40 ; 0x28 - 8000802: 46bd mov sp, r7 - 8000804: bd80 pop {r7, pc} - 8000806: bf00 nop - 8000808: 40004400 .word 0x40004400 - 800080c: 40023800 .word 0x40023800 - 8000810: 40020000 .word 0x40020000 + 8000886: bf00 nop + 8000888: 3728 adds r7, #40 ; 0x28 + 800088a: 46bd mov sp, r7 + 800088c: bd80 pop {r7, pc} + 800088e: bf00 nop + 8000890: 40004400 .word 0x40004400 + 8000894: 40023800 .word 0x40023800 + 8000898: 40020000 .word 0x40020000 -08000814 : +0800089c : /******************************************************************************/ /** * @brief This function handles Non maskable interrupt. */ void NMI_Handler(void) { - 8000814: b480 push {r7} - 8000816: af00 add r7, sp, #0 + 800089c: b480 push {r7} + 800089e: af00 add r7, sp, #0 /* USER CODE BEGIN NonMaskableInt_IRQn 0 */ /* USER CODE END NonMaskableInt_IRQn 0 */ /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ while (1) - 8000818: e7fe b.n 8000818 + 80008a0: e7fe b.n 80008a0 -0800081a : +080008a2 : /** * @brief This function handles Hard fault interrupt. */ void HardFault_Handler(void) { - 800081a: b480 push {r7} - 800081c: af00 add r7, sp, #0 + 80008a2: b480 push {r7} + 80008a4: af00 add r7, sp, #0 /* USER CODE BEGIN HardFault_IRQn 0 */ /* USER CODE END HardFault_IRQn 0 */ while (1) - 800081e: e7fe b.n 800081e + 80008a6: e7fe b.n 80008a6 -08000820 : +080008a8 : /** * @brief This function handles Memory management fault. */ void MemManage_Handler(void) { - 8000820: b480 push {r7} - 8000822: af00 add r7, sp, #0 + 80008a8: b480 push {r7} + 80008aa: af00 add r7, sp, #0 /* USER CODE BEGIN MemoryManagement_IRQn 0 */ /* USER CODE END MemoryManagement_IRQn 0 */ while (1) - 8000824: e7fe b.n 8000824 + 80008ac: e7fe b.n 80008ac -08000826 : +080008ae : /** * @brief This function handles Pre-fetch fault, memory access fault. */ void BusFault_Handler(void) { - 8000826: b480 push {r7} - 8000828: af00 add r7, sp, #0 + 80008ae: b480 push {r7} + 80008b0: af00 add r7, sp, #0 /* USER CODE BEGIN BusFault_IRQn 0 */ /* USER CODE END BusFault_IRQn 0 */ while (1) - 800082a: e7fe b.n 800082a + 80008b2: e7fe b.n 80008b2 -0800082c : +080008b4 : /** * @brief This function handles Undefined instruction or illegal state. */ void UsageFault_Handler(void) { - 800082c: b480 push {r7} - 800082e: af00 add r7, sp, #0 + 80008b4: b480 push {r7} + 80008b6: af00 add r7, sp, #0 /* USER CODE BEGIN UsageFault_IRQn 0 */ /* USER CODE END UsageFault_IRQn 0 */ while (1) - 8000830: e7fe b.n 8000830 + 80008b8: e7fe b.n 80008b8 -08000832 : +080008ba : /** * @brief This function handles System service call via SWI instruction. */ void SVC_Handler(void) { - 8000832: b480 push {r7} - 8000834: af00 add r7, sp, #0 + 80008ba: b480 push {r7} + 80008bc: af00 add r7, sp, #0 /* USER CODE END SVCall_IRQn 0 */ /* USER CODE BEGIN SVCall_IRQn 1 */ /* USER CODE END SVCall_IRQn 1 */ } - 8000836: bf00 nop - 8000838: 46bd mov sp, r7 - 800083a: f85d 7b04 ldr.w r7, [sp], #4 - 800083e: 4770 bx lr + 80008be: bf00 nop + 80008c0: 46bd mov sp, r7 + 80008c2: f85d 7b04 ldr.w r7, [sp], #4 + 80008c6: 4770 bx lr -08000840 : +080008c8 : /** * @brief This function handles Debug monitor. */ void DebugMon_Handler(void) { - 8000840: b480 push {r7} - 8000842: af00 add r7, sp, #0 + 80008c8: b480 push {r7} + 80008ca: af00 add r7, sp, #0 /* USER CODE END DebugMonitor_IRQn 0 */ /* USER CODE BEGIN DebugMonitor_IRQn 1 */ /* USER CODE END DebugMonitor_IRQn 1 */ } - 8000844: bf00 nop - 8000846: 46bd mov sp, r7 - 8000848: f85d 7b04 ldr.w r7, [sp], #4 - 800084c: 4770 bx lr + 80008cc: bf00 nop + 80008ce: 46bd mov sp, r7 + 80008d0: f85d 7b04 ldr.w r7, [sp], #4 + 80008d4: 4770 bx lr -0800084e : +080008d6 : /** * @brief This function handles Pendable request for system service. */ void PendSV_Handler(void) { - 800084e: b480 push {r7} - 8000850: af00 add r7, sp, #0 + 80008d6: b480 push {r7} + 80008d8: af00 add r7, sp, #0 /* USER CODE END PendSV_IRQn 0 */ /* USER CODE BEGIN PendSV_IRQn 1 */ /* USER CODE END PendSV_IRQn 1 */ } - 8000852: bf00 nop - 8000854: 46bd mov sp, r7 - 8000856: f85d 7b04 ldr.w r7, [sp], #4 - 800085a: 4770 bx lr + 80008da: bf00 nop + 80008dc: 46bd mov sp, r7 + 80008de: f85d 7b04 ldr.w r7, [sp], #4 + 80008e2: 4770 bx lr -0800085c : +080008e4 : /** * @brief This function handles System tick timer. */ void SysTick_Handler(void) { - 800085c: b580 push {r7, lr} - 800085e: af00 add r7, sp, #0 + 80008e4: b580 push {r7, lr} + 80008e6: af00 add r7, sp, #0 /* USER CODE BEGIN SysTick_IRQn 0 */ /* USER CODE END SysTick_IRQn 0 */ HAL_IncTick(); - 8000860: f000 f890 bl 8000984 + 80008e8: f000 f890 bl 8000a0c /* USER CODE BEGIN SysTick_IRQn 1 */ /* USER CODE END SysTick_IRQn 1 */ } - 8000864: bf00 nop - 8000866: bd80 pop {r7, pc} + 80008ec: bf00 nop + 80008ee: bd80 pop {r7, pc} -08000868 : +080008f0 : * configuration. * @param None * @retval None */ void SystemInit(void) { - 8000868: b480 push {r7} - 800086a: af00 add r7, sp, #0 + 80008f0: b480 push {r7} + 80008f2: af00 add r7, sp, #0 /* FPU settings ------------------------------------------------------------*/ #if (__FPU_PRESENT == 1) && (__FPU_USED == 1) SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */ - 800086c: 4b06 ldr r3, [pc, #24] ; (8000888 ) - 800086e: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 - 8000872: 4a05 ldr r2, [pc, #20] ; (8000888 ) - 8000874: f443 0370 orr.w r3, r3, #15728640 ; 0xf00000 - 8000878: f8c2 3088 str.w r3, [r2, #136] ; 0x88 + 80008f4: 4b06 ldr r3, [pc, #24] ; (8000910 ) + 80008f6: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 + 80008fa: 4a05 ldr r2, [pc, #20] ; (8000910 ) + 80008fc: f443 0370 orr.w r3, r3, #15728640 ; 0xf00000 + 8000900: f8c2 3088 str.w r3, [r2, #136] ; 0x88 /* Configure the Vector Table location -------------------------------------*/ #if defined(USER_VECT_TAB_ADDRESS) SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */ #endif /* USER_VECT_TAB_ADDRESS */ } - 800087c: bf00 nop - 800087e: 46bd mov sp, r7 - 8000880: f85d 7b04 ldr.w r7, [sp], #4 - 8000884: 4770 bx lr - 8000886: bf00 nop - 8000888: e000ed00 .word 0xe000ed00 + 8000904: bf00 nop + 8000906: 46bd mov sp, r7 + 8000908: f85d 7b04 ldr.w r7, [sp], #4 + 800090c: 4770 bx lr + 800090e: bf00 nop + 8000910: e000ed00 .word 0xe000ed00 -0800088c : +08000914 : .section .text.Reset_Handler .weak Reset_Handler .type Reset_Handler, %function Reset_Handler: ldr sp, =_estack /* set stack pointer */ - 800088c: f8df d034 ldr.w sp, [pc, #52] ; 80008c4 + 8000914: f8df d034 ldr.w sp, [pc, #52] ; 800094c /* Copy the data segment initializers from flash to SRAM */ ldr r0, =_sdata - 8000890: 480d ldr r0, [pc, #52] ; (80008c8 ) + 8000918: 480d ldr r0, [pc, #52] ; (8000950 ) ldr r1, =_edata - 8000892: 490e ldr r1, [pc, #56] ; (80008cc ) + 800091a: 490e ldr r1, [pc, #56] ; (8000954 ) ldr r2, =_sidata - 8000894: 4a0e ldr r2, [pc, #56] ; (80008d0 ) + 800091c: 4a0e ldr r2, [pc, #56] ; (8000958 ) movs r3, #0 - 8000896: 2300 movs r3, #0 + 800091e: 2300 movs r3, #0 b LoopCopyDataInit - 8000898: e002 b.n 80008a0 + 8000920: e002 b.n 8000928 -0800089a : +08000922 : CopyDataInit: ldr r4, [r2, r3] - 800089a: 58d4 ldr r4, [r2, r3] + 8000922: 58d4 ldr r4, [r2, r3] str r4, [r0, r3] - 800089c: 50c4 str r4, [r0, r3] + 8000924: 50c4 str r4, [r0, r3] adds r3, r3, #4 - 800089e: 3304 adds r3, #4 + 8000926: 3304 adds r3, #4 -080008a0 : +08000928 : LoopCopyDataInit: adds r4, r0, r3 - 80008a0: 18c4 adds r4, r0, r3 + 8000928: 18c4 adds r4, r0, r3 cmp r4, r1 - 80008a2: 428c cmp r4, r1 + 800092a: 428c cmp r4, r1 bcc CopyDataInit - 80008a4: d3f9 bcc.n 800089a + 800092c: d3f9 bcc.n 8000922 /* Zero fill the bss segment. */ ldr r2, =_sbss - 80008a6: 4a0b ldr r2, [pc, #44] ; (80008d4 ) + 800092e: 4a0b ldr r2, [pc, #44] ; (800095c ) ldr r4, =_ebss - 80008a8: 4c0b ldr r4, [pc, #44] ; (80008d8 ) + 8000930: 4c0b ldr r4, [pc, #44] ; (8000960 ) movs r3, #0 - 80008aa: 2300 movs r3, #0 + 8000932: 2300 movs r3, #0 b LoopFillZerobss - 80008ac: e001 b.n 80008b2 + 8000934: e001 b.n 800093a -080008ae : +08000936 : FillZerobss: str r3, [r2] - 80008ae: 6013 str r3, [r2, #0] + 8000936: 6013 str r3, [r2, #0] adds r2, r2, #4 - 80008b0: 3204 adds r2, #4 + 8000938: 3204 adds r2, #4 -080008b2 : +0800093a : LoopFillZerobss: cmp r2, r4 - 80008b2: 42a2 cmp r2, r4 + 800093a: 42a2 cmp r2, r4 bcc FillZerobss - 80008b4: d3fb bcc.n 80008ae + 800093c: d3fb bcc.n 8000936 /* Call the clock system initialization function.*/ bl SystemInit - 80008b6: f7ff ffd7 bl 8000868 + 800093e: f7ff ffd7 bl 80008f0 /* Call static constructors */ bl __libc_init_array - 80008ba: f001 fb69 bl 8001f90 <__libc_init_array> + 8000942: f001 fc23 bl 800218c <__libc_init_array> /* Call the application's entry point.*/ bl main - 80008be: f7ff fe09 bl 80004d4
+ 8000946: f7ff fdc5 bl 80004d4
bx lr - 80008c2: 4770 bx lr + 800094a: 4770 bx lr ldr sp, =_estack /* set stack pointer */ - 80008c4: 20020000 .word 0x20020000 + 800094c: 20020000 .word 0x20020000 ldr r0, =_sdata - 80008c8: 20000000 .word 0x20000000 + 8000950: 20000000 .word 0x20000000 ldr r1, =_edata - 80008cc: 2000000c .word 0x2000000c + 8000954: 2000000c .word 0x2000000c ldr r2, =_sidata - 80008d0: 08002020 .word 0x08002020 + 8000958: 08002214 .word 0x08002214 ldr r2, =_sbss - 80008d4: 2000000c .word 0x2000000c + 800095c: 2000000c .word 0x2000000c ldr r4, =_ebss - 80008d8: 2000007c .word 0x2000007c + 8000960: 2000007c .word 0x2000007c -080008dc : +08000964 : * @retval None */ .section .text.Default_Handler,"ax",%progbits Default_Handler: Infinite_Loop: b Infinite_Loop - 80008dc: e7fe b.n 80008dc + 8000964: e7fe b.n 8000964 ... -080008e0 : +08000968 : * need to ensure that the SysTick time base is always set to 1 millisecond * to have correct HAL operation. * @retval HAL status */ HAL_StatusTypeDef HAL_Init(void) { - 80008e0: b580 push {r7, lr} - 80008e2: af00 add r7, sp, #0 + 8000968: b580 push {r7, lr} + 800096a: af00 add r7, sp, #0 /* Configure Flash prefetch, Instruction cache, Data cache */ #if (INSTRUCTION_CACHE_ENABLE != 0U) __HAL_FLASH_INSTRUCTION_CACHE_ENABLE(); - 80008e4: 4b0e ldr r3, [pc, #56] ; (8000920 ) - 80008e6: 681b ldr r3, [r3, #0] - 80008e8: 4a0d ldr r2, [pc, #52] ; (8000920 ) - 80008ea: f443 7300 orr.w r3, r3, #512 ; 0x200 - 80008ee: 6013 str r3, [r2, #0] + 800096c: 4b0e ldr r3, [pc, #56] ; (80009a8 ) + 800096e: 681b ldr r3, [r3, #0] + 8000970: 4a0d ldr r2, [pc, #52] ; (80009a8 ) + 8000972: f443 7300 orr.w r3, r3, #512 ; 0x200 + 8000976: 6013 str r3, [r2, #0] #endif /* INSTRUCTION_CACHE_ENABLE */ #if (DATA_CACHE_ENABLE != 0U) __HAL_FLASH_DATA_CACHE_ENABLE(); - 80008f0: 4b0b ldr r3, [pc, #44] ; (8000920 ) - 80008f2: 681b ldr r3, [r3, #0] - 80008f4: 4a0a ldr r2, [pc, #40] ; (8000920 ) - 80008f6: f443 6380 orr.w r3, r3, #1024 ; 0x400 - 80008fa: 6013 str r3, [r2, #0] + 8000978: 4b0b ldr r3, [pc, #44] ; (80009a8 ) + 800097a: 681b ldr r3, [r3, #0] + 800097c: 4a0a ldr r2, [pc, #40] ; (80009a8 ) + 800097e: f443 6380 orr.w r3, r3, #1024 ; 0x400 + 8000982: 6013 str r3, [r2, #0] #endif /* DATA_CACHE_ENABLE */ #if (PREFETCH_ENABLE != 0U) __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); - 80008fc: 4b08 ldr r3, [pc, #32] ; (8000920 ) - 80008fe: 681b ldr r3, [r3, #0] - 8000900: 4a07 ldr r2, [pc, #28] ; (8000920 ) - 8000902: f443 7380 orr.w r3, r3, #256 ; 0x100 - 8000906: 6013 str r3, [r2, #0] + 8000984: 4b08 ldr r3, [pc, #32] ; (80009a8 ) + 8000986: 681b ldr r3, [r3, #0] + 8000988: 4a07 ldr r2, [pc, #28] ; (80009a8 ) + 800098a: f443 7380 orr.w r3, r3, #256 ; 0x100 + 800098e: 6013 str r3, [r2, #0] #endif /* PREFETCH_ENABLE */ /* Set Interrupt Group Priority */ HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); - 8000908: 2003 movs r0, #3 - 800090a: f000 f90d bl 8000b28 + 8000990: 2003 movs r0, #3 + 8000992: f000 f90d bl 8000bb0 /* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */ HAL_InitTick(TICK_INT_PRIORITY); - 800090e: 2000 movs r0, #0 - 8000910: f000 f808 bl 8000924 + 8000996: 2000 movs r0, #0 + 8000998: f000 f808 bl 80009ac /* Init the low level hardware */ HAL_MspInit(); - 8000914: f7ff ff0e bl 8000734 + 800099c: f7ff ff0e bl 80007bc /* Return function status */ return HAL_OK; - 8000918: 2300 movs r3, #0 + 80009a0: 2300 movs r3, #0 } - 800091a: 4618 mov r0, r3 - 800091c: bd80 pop {r7, pc} - 800091e: bf00 nop - 8000920: 40023c00 .word 0x40023c00 + 80009a2: 4618 mov r0, r3 + 80009a4: bd80 pop {r7, pc} + 80009a6: bf00 nop + 80009a8: 40023c00 .word 0x40023c00 -08000924 : +080009ac : * implementation in user file. * @param TickPriority Tick interrupt priority. * @retval HAL status */ __weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) { - 8000924: b580 push {r7, lr} - 8000926: b082 sub sp, #8 - 8000928: af00 add r7, sp, #0 - 800092a: 6078 str r0, [r7, #4] + 80009ac: b580 push {r7, lr} + 80009ae: b082 sub sp, #8 + 80009b0: af00 add r7, sp, #0 + 80009b2: 6078 str r0, [r7, #4] /* Configure the SysTick to have interrupt in 1ms time basis*/ if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U) - 800092c: 4b12 ldr r3, [pc, #72] ; (8000978 ) - 800092e: 681a ldr r2, [r3, #0] - 8000930: 4b12 ldr r3, [pc, #72] ; (800097c ) - 8000932: 781b ldrb r3, [r3, #0] - 8000934: 4619 mov r1, r3 - 8000936: f44f 737a mov.w r3, #1000 ; 0x3e8 - 800093a: fbb3 f3f1 udiv r3, r3, r1 - 800093e: fbb2 f3f3 udiv r3, r2, r3 - 8000942: 4618 mov r0, r3 - 8000944: f000 f917 bl 8000b76 - 8000948: 4603 mov r3, r0 - 800094a: 2b00 cmp r3, #0 - 800094c: d001 beq.n 8000952 + 80009b4: 4b12 ldr r3, [pc, #72] ; (8000a00 ) + 80009b6: 681a ldr r2, [r3, #0] + 80009b8: 4b12 ldr r3, [pc, #72] ; (8000a04 ) + 80009ba: 781b ldrb r3, [r3, #0] + 80009bc: 4619 mov r1, r3 + 80009be: f44f 737a mov.w r3, #1000 ; 0x3e8 + 80009c2: fbb3 f3f1 udiv r3, r3, r1 + 80009c6: fbb2 f3f3 udiv r3, r2, r3 + 80009ca: 4618 mov r0, r3 + 80009cc: f000 f917 bl 8000bfe + 80009d0: 4603 mov r3, r0 + 80009d2: 2b00 cmp r3, #0 + 80009d4: d001 beq.n 80009da { return HAL_ERROR; - 800094e: 2301 movs r3, #1 - 8000950: e00e b.n 8000970 + 80009d6: 2301 movs r3, #1 + 80009d8: e00e b.n 80009f8 } /* Configure the SysTick IRQ priority */ if (TickPriority < (1UL << __NVIC_PRIO_BITS)) - 8000952: 687b ldr r3, [r7, #4] - 8000954: 2b0f cmp r3, #15 - 8000956: d80a bhi.n 800096e + 80009da: 687b ldr r3, [r7, #4] + 80009dc: 2b0f cmp r3, #15 + 80009de: d80a bhi.n 80009f6 { HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U); - 8000958: 2200 movs r2, #0 - 800095a: 6879 ldr r1, [r7, #4] - 800095c: f04f 30ff mov.w r0, #4294967295 - 8000960: f000 f8ed bl 8000b3e + 80009e0: 2200 movs r2, #0 + 80009e2: 6879 ldr r1, [r7, #4] + 80009e4: f04f 30ff mov.w r0, #4294967295 + 80009e8: f000 f8ed bl 8000bc6 uwTickPrio = TickPriority; - 8000964: 4a06 ldr r2, [pc, #24] ; (8000980 ) - 8000966: 687b ldr r3, [r7, #4] - 8000968: 6013 str r3, [r2, #0] + 80009ec: 4a06 ldr r2, [pc, #24] ; (8000a08 ) + 80009ee: 687b ldr r3, [r7, #4] + 80009f0: 6013 str r3, [r2, #0] { return HAL_ERROR; } /* Return function status */ return HAL_OK; - 800096a: 2300 movs r3, #0 - 800096c: e000 b.n 8000970 + 80009f2: 2300 movs r3, #0 + 80009f4: e000 b.n 80009f8 return HAL_ERROR; - 800096e: 2301 movs r3, #1 + 80009f6: 2301 movs r3, #1 } - 8000970: 4618 mov r0, r3 - 8000972: 3708 adds r7, #8 - 8000974: 46bd mov sp, r7 - 8000976: bd80 pop {r7, pc} - 8000978: 20000000 .word 0x20000000 - 800097c: 20000008 .word 0x20000008 - 8000980: 20000004 .word 0x20000004 + 80009f8: 4618 mov r0, r3 + 80009fa: 3708 adds r7, #8 + 80009fc: 46bd mov sp, r7 + 80009fe: bd80 pop {r7, pc} + 8000a00: 20000000 .word 0x20000000 + 8000a04: 20000008 .word 0x20000008 + 8000a08: 20000004 .word 0x20000004 -08000984 : +08000a0c : * @note This function is declared as __weak to be overwritten in case of other * implementations in user file. * @retval None */ __weak void HAL_IncTick(void) { - 8000984: b480 push {r7} - 8000986: af00 add r7, sp, #0 + 8000a0c: b480 push {r7} + 8000a0e: af00 add r7, sp, #0 uwTick += uwTickFreq; - 8000988: 4b06 ldr r3, [pc, #24] ; (80009a4 ) - 800098a: 781b ldrb r3, [r3, #0] - 800098c: 461a mov r2, r3 - 800098e: 4b06 ldr r3, [pc, #24] ; (80009a8 ) - 8000990: 681b ldr r3, [r3, #0] - 8000992: 4413 add r3, r2 - 8000994: 4a04 ldr r2, [pc, #16] ; (80009a8 ) - 8000996: 6013 str r3, [r2, #0] + 8000a10: 4b06 ldr r3, [pc, #24] ; (8000a2c ) + 8000a12: 781b ldrb r3, [r3, #0] + 8000a14: 461a mov r2, r3 + 8000a16: 4b06 ldr r3, [pc, #24] ; (8000a30 ) + 8000a18: 681b ldr r3, [r3, #0] + 8000a1a: 4413 add r3, r2 + 8000a1c: 4a04 ldr r2, [pc, #16] ; (8000a30 ) + 8000a1e: 6013 str r3, [r2, #0] } - 8000998: bf00 nop - 800099a: 46bd mov sp, r7 - 800099c: f85d 7b04 ldr.w r7, [sp], #4 - 80009a0: 4770 bx lr - 80009a2: bf00 nop - 80009a4: 20000008 .word 0x20000008 - 80009a8: 20000078 .word 0x20000078 + 8000a20: bf00 nop + 8000a22: 46bd mov sp, r7 + 8000a24: f85d 7b04 ldr.w r7, [sp], #4 + 8000a28: 4770 bx lr + 8000a2a: bf00 nop + 8000a2c: 20000008 .word 0x20000008 + 8000a30: 20000078 .word 0x20000078 -080009ac : +08000a34 : * @note This function is declared as __weak to be overwritten in case of other * implementations in user file. * @retval tick value */ __weak uint32_t HAL_GetTick(void) { - 80009ac: b480 push {r7} - 80009ae: af00 add r7, sp, #0 + 8000a34: b480 push {r7} + 8000a36: af00 add r7, sp, #0 return uwTick; - 80009b0: 4b03 ldr r3, [pc, #12] ; (80009c0 ) - 80009b2: 681b ldr r3, [r3, #0] + 8000a38: 4b03 ldr r3, [pc, #12] ; (8000a48 ) + 8000a3a: 681b ldr r3, [r3, #0] } - 80009b4: 4618 mov r0, r3 - 80009b6: 46bd mov sp, r7 - 80009b8: f85d 7b04 ldr.w r7, [sp], #4 - 80009bc: 4770 bx lr - 80009be: bf00 nop - 80009c0: 20000078 .word 0x20000078 + 8000a3c: 4618 mov r0, r3 + 8000a3e: 46bd mov sp, r7 + 8000a40: f85d 7b04 ldr.w r7, [sp], #4 + 8000a44: 4770 bx lr + 8000a46: bf00 nop + 8000a48: 20000078 .word 0x20000078 -080009c4 <__NVIC_SetPriorityGrouping>: +08000a4c <__NVIC_SetPriorityGrouping>: In case of a conflict between priority grouping and available priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. \param [in] PriorityGroup Priority grouping field. */ __STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup) { - 80009c4: b480 push {r7} - 80009c6: b085 sub sp, #20 - 80009c8: af00 add r7, sp, #0 - 80009ca: 6078 str r0, [r7, #4] + 8000a4c: b480 push {r7} + 8000a4e: b085 sub sp, #20 + 8000a50: af00 add r7, sp, #0 + 8000a52: 6078 str r0, [r7, #4] uint32_t reg_value; uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - 80009cc: 687b ldr r3, [r7, #4] - 80009ce: f003 0307 and.w r3, r3, #7 - 80009d2: 60fb str r3, [r7, #12] + 8000a54: 687b ldr r3, [r7, #4] + 8000a56: f003 0307 and.w r3, r3, #7 + 8000a5a: 60fb str r3, [r7, #12] reg_value = SCB->AIRCR; /* read old register configuration */ - 80009d4: 4b0c ldr r3, [pc, #48] ; (8000a08 <__NVIC_SetPriorityGrouping+0x44>) - 80009d6: 68db ldr r3, [r3, #12] - 80009d8: 60bb str r3, [r7, #8] + 8000a5c: 4b0c ldr r3, [pc, #48] ; (8000a90 <__NVIC_SetPriorityGrouping+0x44>) + 8000a5e: 68db ldr r3, [r3, #12] + 8000a60: 60bb str r3, [r7, #8] reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ - 80009da: 68ba ldr r2, [r7, #8] - 80009dc: f64f 03ff movw r3, #63743 ; 0xf8ff - 80009e0: 4013 ands r3, r2 - 80009e2: 60bb str r3, [r7, #8] + 8000a62: 68ba ldr r2, [r7, #8] + 8000a64: f64f 03ff movw r3, #63743 ; 0xf8ff + 8000a68: 4013 ands r3, r2 + 8000a6a: 60bb str r3, [r7, #8] reg_value = (reg_value | ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */ - 80009e4: 68fb ldr r3, [r7, #12] - 80009e6: 021a lsls r2, r3, #8 + 8000a6c: 68fb ldr r3, [r7, #12] + 8000a6e: 021a lsls r2, r3, #8 ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | - 80009e8: 68bb ldr r3, [r7, #8] - 80009ea: 4313 orrs r3, r2 + 8000a70: 68bb ldr r3, [r7, #8] + 8000a72: 4313 orrs r3, r2 reg_value = (reg_value | - 80009ec: f043 63bf orr.w r3, r3, #100139008 ; 0x5f80000 - 80009f0: f443 3300 orr.w r3, r3, #131072 ; 0x20000 - 80009f4: 60bb str r3, [r7, #8] + 8000a74: f043 63bf orr.w r3, r3, #100139008 ; 0x5f80000 + 8000a78: f443 3300 orr.w r3, r3, #131072 ; 0x20000 + 8000a7c: 60bb str r3, [r7, #8] SCB->AIRCR = reg_value; - 80009f6: 4a04 ldr r2, [pc, #16] ; (8000a08 <__NVIC_SetPriorityGrouping+0x44>) - 80009f8: 68bb ldr r3, [r7, #8] - 80009fa: 60d3 str r3, [r2, #12] + 8000a7e: 4a04 ldr r2, [pc, #16] ; (8000a90 <__NVIC_SetPriorityGrouping+0x44>) + 8000a80: 68bb ldr r3, [r7, #8] + 8000a82: 60d3 str r3, [r2, #12] } - 80009fc: bf00 nop - 80009fe: 3714 adds r7, #20 - 8000a00: 46bd mov sp, r7 - 8000a02: f85d 7b04 ldr.w r7, [sp], #4 - 8000a06: 4770 bx lr - 8000a08: e000ed00 .word 0xe000ed00 + 8000a84: bf00 nop + 8000a86: 3714 adds r7, #20 + 8000a88: 46bd mov sp, r7 + 8000a8a: f85d 7b04 ldr.w r7, [sp], #4 + 8000a8e: 4770 bx lr + 8000a90: e000ed00 .word 0xe000ed00 -08000a0c <__NVIC_GetPriorityGrouping>: +08000a94 <__NVIC_GetPriorityGrouping>: \brief Get Priority Grouping \details Reads the priority grouping field from the NVIC Interrupt Controller. \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). */ __STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void) { - 8000a0c: b480 push {r7} - 8000a0e: af00 add r7, sp, #0 + 8000a94: b480 push {r7} + 8000a96: af00 add r7, sp, #0 return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); - 8000a10: 4b04 ldr r3, [pc, #16] ; (8000a24 <__NVIC_GetPriorityGrouping+0x18>) - 8000a12: 68db ldr r3, [r3, #12] - 8000a14: 0a1b lsrs r3, r3, #8 - 8000a16: f003 0307 and.w r3, r3, #7 + 8000a98: 4b04 ldr r3, [pc, #16] ; (8000aac <__NVIC_GetPriorityGrouping+0x18>) + 8000a9a: 68db ldr r3, [r3, #12] + 8000a9c: 0a1b lsrs r3, r3, #8 + 8000a9e: f003 0307 and.w r3, r3, #7 } - 8000a1a: 4618 mov r0, r3 - 8000a1c: 46bd mov sp, r7 - 8000a1e: f85d 7b04 ldr.w r7, [sp], #4 - 8000a22: 4770 bx lr - 8000a24: e000ed00 .word 0xe000ed00 + 8000aa2: 4618 mov r0, r3 + 8000aa4: 46bd mov sp, r7 + 8000aa6: f85d 7b04 ldr.w r7, [sp], #4 + 8000aaa: 4770 bx lr + 8000aac: e000ed00 .word 0xe000ed00 -08000a28 <__NVIC_SetPriority>: +08000ab0 <__NVIC_SetPriority>: \param [in] IRQn Interrupt number. \param [in] priority Priority to set. \note The priority cannot be set for every processor exception. */ __STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) { - 8000a28: b480 push {r7} - 8000a2a: b083 sub sp, #12 - 8000a2c: af00 add r7, sp, #0 - 8000a2e: 4603 mov r3, r0 - 8000a30: 6039 str r1, [r7, #0] - 8000a32: 71fb strb r3, [r7, #7] + 8000ab0: b480 push {r7} + 8000ab2: b083 sub sp, #12 + 8000ab4: af00 add r7, sp, #0 + 8000ab6: 4603 mov r3, r0 + 8000ab8: 6039 str r1, [r7, #0] + 8000aba: 71fb strb r3, [r7, #7] if ((int32_t)(IRQn) >= 0) - 8000a34: f997 3007 ldrsb.w r3, [r7, #7] - 8000a38: 2b00 cmp r3, #0 - 8000a3a: db0a blt.n 8000a52 <__NVIC_SetPriority+0x2a> + 8000abc: f997 3007 ldrsb.w r3, [r7, #7] + 8000ac0: 2b00 cmp r3, #0 + 8000ac2: db0a blt.n 8000ada <__NVIC_SetPriority+0x2a> { NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); - 8000a3c: 683b ldr r3, [r7, #0] - 8000a3e: b2da uxtb r2, r3 - 8000a40: 490c ldr r1, [pc, #48] ; (8000a74 <__NVIC_SetPriority+0x4c>) - 8000a42: f997 3007 ldrsb.w r3, [r7, #7] - 8000a46: 0112 lsls r2, r2, #4 - 8000a48: b2d2 uxtb r2, r2 - 8000a4a: 440b add r3, r1 - 8000a4c: f883 2300 strb.w r2, [r3, #768] ; 0x300 + 8000ac4: 683b ldr r3, [r7, #0] + 8000ac6: b2da uxtb r2, r3 + 8000ac8: 490c ldr r1, [pc, #48] ; (8000afc <__NVIC_SetPriority+0x4c>) + 8000aca: f997 3007 ldrsb.w r3, [r7, #7] + 8000ace: 0112 lsls r2, r2, #4 + 8000ad0: b2d2 uxtb r2, r2 + 8000ad2: 440b add r3, r1 + 8000ad4: f883 2300 strb.w r2, [r3, #768] ; 0x300 } else { SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); } } - 8000a50: e00a b.n 8000a68 <__NVIC_SetPriority+0x40> + 8000ad8: e00a b.n 8000af0 <__NVIC_SetPriority+0x40> SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); - 8000a52: 683b ldr r3, [r7, #0] - 8000a54: b2da uxtb r2, r3 - 8000a56: 4908 ldr r1, [pc, #32] ; (8000a78 <__NVIC_SetPriority+0x50>) - 8000a58: 79fb ldrb r3, [r7, #7] - 8000a5a: f003 030f and.w r3, r3, #15 - 8000a5e: 3b04 subs r3, #4 - 8000a60: 0112 lsls r2, r2, #4 - 8000a62: b2d2 uxtb r2, r2 - 8000a64: 440b add r3, r1 - 8000a66: 761a strb r2, [r3, #24] + 8000ada: 683b ldr r3, [r7, #0] + 8000adc: b2da uxtb r2, r3 + 8000ade: 4908 ldr r1, [pc, #32] ; (8000b00 <__NVIC_SetPriority+0x50>) + 8000ae0: 79fb ldrb r3, [r7, #7] + 8000ae2: f003 030f and.w r3, r3, #15 + 8000ae6: 3b04 subs r3, #4 + 8000ae8: 0112 lsls r2, r2, #4 + 8000aea: b2d2 uxtb r2, r2 + 8000aec: 440b add r3, r1 + 8000aee: 761a strb r2, [r3, #24] } - 8000a68: bf00 nop - 8000a6a: 370c adds r7, #12 - 8000a6c: 46bd mov sp, r7 - 8000a6e: f85d 7b04 ldr.w r7, [sp], #4 - 8000a72: 4770 bx lr - 8000a74: e000e100 .word 0xe000e100 - 8000a78: e000ed00 .word 0xe000ed00 + 8000af0: bf00 nop + 8000af2: 370c adds r7, #12 + 8000af4: 46bd mov sp, r7 + 8000af6: f85d 7b04 ldr.w r7, [sp], #4 + 8000afa: 4770 bx lr + 8000afc: e000e100 .word 0xe000e100 + 8000b00: e000ed00 .word 0xe000ed00 -08000a7c : +08000b04 : \param [in] PreemptPriority Preemptive priority value (starting from 0). \param [in] SubPriority Subpriority value (starting from 0). \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority(). */ __STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) { - 8000a7c: b480 push {r7} - 8000a7e: b089 sub sp, #36 ; 0x24 - 8000a80: af00 add r7, sp, #0 - 8000a82: 60f8 str r0, [r7, #12] - 8000a84: 60b9 str r1, [r7, #8] - 8000a86: 607a str r2, [r7, #4] + 8000b04: b480 push {r7} + 8000b06: b089 sub sp, #36 ; 0x24 + 8000b08: af00 add r7, sp, #0 + 8000b0a: 60f8 str r0, [r7, #12] + 8000b0c: 60b9 str r1, [r7, #8] + 8000b0e: 607a str r2, [r7, #4] uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - 8000a88: 68fb ldr r3, [r7, #12] - 8000a8a: f003 0307 and.w r3, r3, #7 - 8000a8e: 61fb str r3, [r7, #28] + 8000b10: 68fb ldr r3, [r7, #12] + 8000b12: f003 0307 and.w r3, r3, #7 + 8000b16: 61fb str r3, [r7, #28] uint32_t PreemptPriorityBits; uint32_t SubPriorityBits; PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); - 8000a90: 69fb ldr r3, [r7, #28] - 8000a92: f1c3 0307 rsb r3, r3, #7 - 8000a96: 2b04 cmp r3, #4 - 8000a98: bf28 it cs - 8000a9a: 2304 movcs r3, #4 - 8000a9c: 61bb str r3, [r7, #24] + 8000b18: 69fb ldr r3, [r7, #28] + 8000b1a: f1c3 0307 rsb r3, r3, #7 + 8000b1e: 2b04 cmp r3, #4 + 8000b20: bf28 it cs + 8000b22: 2304 movcs r3, #4 + 8000b24: 61bb str r3, [r7, #24] SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); - 8000a9e: 69fb ldr r3, [r7, #28] - 8000aa0: 3304 adds r3, #4 - 8000aa2: 2b06 cmp r3, #6 - 8000aa4: d902 bls.n 8000aac - 8000aa6: 69fb ldr r3, [r7, #28] - 8000aa8: 3b03 subs r3, #3 - 8000aaa: e000 b.n 8000aae - 8000aac: 2300 movs r3, #0 - 8000aae: 617b str r3, [r7, #20] + 8000b26: 69fb ldr r3, [r7, #28] + 8000b28: 3304 adds r3, #4 + 8000b2a: 2b06 cmp r3, #6 + 8000b2c: d902 bls.n 8000b34 + 8000b2e: 69fb ldr r3, [r7, #28] + 8000b30: 3b03 subs r3, #3 + 8000b32: e000 b.n 8000b36 + 8000b34: 2300 movs r3, #0 + 8000b36: 617b str r3, [r7, #20] return ( ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | - 8000ab0: f04f 32ff mov.w r2, #4294967295 - 8000ab4: 69bb ldr r3, [r7, #24] - 8000ab6: fa02 f303 lsl.w r3, r2, r3 - 8000aba: 43da mvns r2, r3 - 8000abc: 68bb ldr r3, [r7, #8] - 8000abe: 401a ands r2, r3 - 8000ac0: 697b ldr r3, [r7, #20] - 8000ac2: 409a lsls r2, r3 + 8000b38: f04f 32ff mov.w r2, #4294967295 + 8000b3c: 69bb ldr r3, [r7, #24] + 8000b3e: fa02 f303 lsl.w r3, r2, r3 + 8000b42: 43da mvns r2, r3 + 8000b44: 68bb ldr r3, [r7, #8] + 8000b46: 401a ands r2, r3 + 8000b48: 697b ldr r3, [r7, #20] + 8000b4a: 409a lsls r2, r3 ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) - 8000ac4: f04f 31ff mov.w r1, #4294967295 - 8000ac8: 697b ldr r3, [r7, #20] - 8000aca: fa01 f303 lsl.w r3, r1, r3 - 8000ace: 43d9 mvns r1, r3 - 8000ad0: 687b ldr r3, [r7, #4] - 8000ad2: 400b ands r3, r1 + 8000b4c: f04f 31ff mov.w r1, #4294967295 + 8000b50: 697b ldr r3, [r7, #20] + 8000b52: fa01 f303 lsl.w r3, r1, r3 + 8000b56: 43d9 mvns r1, r3 + 8000b58: 687b ldr r3, [r7, #4] + 8000b5a: 400b ands r3, r1 ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | - 8000ad4: 4313 orrs r3, r2 + 8000b5c: 4313 orrs r3, r2 ); } - 8000ad6: 4618 mov r0, r3 - 8000ad8: 3724 adds r7, #36 ; 0x24 - 8000ada: 46bd mov sp, r7 - 8000adc: f85d 7b04 ldr.w r7, [sp], #4 - 8000ae0: 4770 bx lr + 8000b5e: 4618 mov r0, r3 + 8000b60: 3724 adds r7, #36 ; 0x24 + 8000b62: 46bd mov sp, r7 + 8000b64: f85d 7b04 ldr.w r7, [sp], #4 + 8000b68: 4770 bx lr ... -08000ae4 : +08000b6c : \note When the variable __Vendor_SysTickConfig is set to 1, then the function SysTick_Config is not included. In this case, the file device.h must contain a vendor-specific implementation of this function. */ __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) { - 8000ae4: b580 push {r7, lr} - 8000ae6: b082 sub sp, #8 - 8000ae8: af00 add r7, sp, #0 - 8000aea: 6078 str r0, [r7, #4] + 8000b6c: b580 push {r7, lr} + 8000b6e: b082 sub sp, #8 + 8000b70: af00 add r7, sp, #0 + 8000b72: 6078 str r0, [r7, #4] if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) - 8000aec: 687b ldr r3, [r7, #4] - 8000aee: 3b01 subs r3, #1 - 8000af0: f1b3 7f80 cmp.w r3, #16777216 ; 0x1000000 - 8000af4: d301 bcc.n 8000afa + 8000b74: 687b ldr r3, [r7, #4] + 8000b76: 3b01 subs r3, #1 + 8000b78: f1b3 7f80 cmp.w r3, #16777216 ; 0x1000000 + 8000b7c: d301 bcc.n 8000b82 { return (1UL); /* Reload value impossible */ - 8000af6: 2301 movs r3, #1 - 8000af8: e00f b.n 8000b1a + 8000b7e: 2301 movs r3, #1 + 8000b80: e00f b.n 8000ba2 } SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ - 8000afa: 4a0a ldr r2, [pc, #40] ; (8000b24 ) - 8000afc: 687b ldr r3, [r7, #4] - 8000afe: 3b01 subs r3, #1 - 8000b00: 6053 str r3, [r2, #4] + 8000b82: 4a0a ldr r2, [pc, #40] ; (8000bac ) + 8000b84: 687b ldr r3, [r7, #4] + 8000b86: 3b01 subs r3, #1 + 8000b88: 6053 str r3, [r2, #4] NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ - 8000b02: 210f movs r1, #15 - 8000b04: f04f 30ff mov.w r0, #4294967295 - 8000b08: f7ff ff8e bl 8000a28 <__NVIC_SetPriority> + 8000b8a: 210f movs r1, #15 + 8000b8c: f04f 30ff mov.w r0, #4294967295 + 8000b90: f7ff ff8e bl 8000ab0 <__NVIC_SetPriority> SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ - 8000b0c: 4b05 ldr r3, [pc, #20] ; (8000b24 ) - 8000b0e: 2200 movs r2, #0 - 8000b10: 609a str r2, [r3, #8] + 8000b94: 4b05 ldr r3, [pc, #20] ; (8000bac ) + 8000b96: 2200 movs r2, #0 + 8000b98: 609a str r2, [r3, #8] SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | - 8000b12: 4b04 ldr r3, [pc, #16] ; (8000b24 ) - 8000b14: 2207 movs r2, #7 - 8000b16: 601a str r2, [r3, #0] + 8000b9a: 4b04 ldr r3, [pc, #16] ; (8000bac ) + 8000b9c: 2207 movs r2, #7 + 8000b9e: 601a str r2, [r3, #0] SysTick_CTRL_TICKINT_Msk | SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ return (0UL); /* Function successful */ - 8000b18: 2300 movs r3, #0 + 8000ba0: 2300 movs r3, #0 } - 8000b1a: 4618 mov r0, r3 - 8000b1c: 3708 adds r7, #8 - 8000b1e: 46bd mov sp, r7 - 8000b20: bd80 pop {r7, pc} - 8000b22: bf00 nop - 8000b24: e000e010 .word 0xe000e010 + 8000ba2: 4618 mov r0, r3 + 8000ba4: 3708 adds r7, #8 + 8000ba6: 46bd mov sp, r7 + 8000ba8: bd80 pop {r7, pc} + 8000baa: bf00 nop + 8000bac: e000e010 .word 0xe000e010 -08000b28 : +08000bb0 : * @note When the NVIC_PriorityGroup_0 is selected, IRQ preemption is no more possible. * The pending IRQ priority will be managed only by the subpriority. * @retval None */ void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup) { - 8000b28: b580 push {r7, lr} - 8000b2a: b082 sub sp, #8 - 8000b2c: af00 add r7, sp, #0 - 8000b2e: 6078 str r0, [r7, #4] + 8000bb0: b580 push {r7, lr} + 8000bb2: b082 sub sp, #8 + 8000bb4: af00 add r7, sp, #0 + 8000bb6: 6078 str r0, [r7, #4] /* Check the parameters */ assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup)); /* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */ NVIC_SetPriorityGrouping(PriorityGroup); - 8000b30: 6878 ldr r0, [r7, #4] - 8000b32: f7ff ff47 bl 80009c4 <__NVIC_SetPriorityGrouping> + 8000bb8: 6878 ldr r0, [r7, #4] + 8000bba: f7ff ff47 bl 8000a4c <__NVIC_SetPriorityGrouping> } - 8000b36: bf00 nop - 8000b38: 3708 adds r7, #8 - 8000b3a: 46bd mov sp, r7 - 8000b3c: bd80 pop {r7, pc} + 8000bbe: bf00 nop + 8000bc0: 3708 adds r7, #8 + 8000bc2: 46bd mov sp, r7 + 8000bc4: bd80 pop {r7, pc} -08000b3e : +08000bc6 : * This parameter can be a value between 0 and 15 * A lower priority value indicates a higher priority. * @retval None */ void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority) { - 8000b3e: b580 push {r7, lr} - 8000b40: b086 sub sp, #24 - 8000b42: af00 add r7, sp, #0 - 8000b44: 4603 mov r3, r0 - 8000b46: 60b9 str r1, [r7, #8] - 8000b48: 607a str r2, [r7, #4] - 8000b4a: 73fb strb r3, [r7, #15] + 8000bc6: b580 push {r7, lr} + 8000bc8: b086 sub sp, #24 + 8000bca: af00 add r7, sp, #0 + 8000bcc: 4603 mov r3, r0 + 8000bce: 60b9 str r1, [r7, #8] + 8000bd0: 607a str r2, [r7, #4] + 8000bd2: 73fb strb r3, [r7, #15] uint32_t prioritygroup = 0x00U; - 8000b4c: 2300 movs r3, #0 - 8000b4e: 617b str r3, [r7, #20] + 8000bd4: 2300 movs r3, #0 + 8000bd6: 617b str r3, [r7, #20] /* Check the parameters */ assert_param(IS_NVIC_SUB_PRIORITY(SubPriority)); assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority)); prioritygroup = NVIC_GetPriorityGrouping(); - 8000b50: f7ff ff5c bl 8000a0c <__NVIC_GetPriorityGrouping> - 8000b54: 6178 str r0, [r7, #20] + 8000bd8: f7ff ff5c bl 8000a94 <__NVIC_GetPriorityGrouping> + 8000bdc: 6178 str r0, [r7, #20] NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority)); - 8000b56: 687a ldr r2, [r7, #4] - 8000b58: 68b9 ldr r1, [r7, #8] - 8000b5a: 6978 ldr r0, [r7, #20] - 8000b5c: f7ff ff8e bl 8000a7c - 8000b60: 4602 mov r2, r0 - 8000b62: f997 300f ldrsb.w r3, [r7, #15] - 8000b66: 4611 mov r1, r2 - 8000b68: 4618 mov r0, r3 - 8000b6a: f7ff ff5d bl 8000a28 <__NVIC_SetPriority> + 8000bde: 687a ldr r2, [r7, #4] + 8000be0: 68b9 ldr r1, [r7, #8] + 8000be2: 6978 ldr r0, [r7, #20] + 8000be4: f7ff ff8e bl 8000b04 + 8000be8: 4602 mov r2, r0 + 8000bea: f997 300f ldrsb.w r3, [r7, #15] + 8000bee: 4611 mov r1, r2 + 8000bf0: 4618 mov r0, r3 + 8000bf2: f7ff ff5d bl 8000ab0 <__NVIC_SetPriority> } - 8000b6e: bf00 nop - 8000b70: 3718 adds r7, #24 - 8000b72: 46bd mov sp, r7 - 8000b74: bd80 pop {r7, pc} + 8000bf6: bf00 nop + 8000bf8: 3718 adds r7, #24 + 8000bfa: 46bd mov sp, r7 + 8000bfc: bd80 pop {r7, pc} -08000b76 : +08000bfe : * @param TicksNumb Specifies the ticks Number of ticks between two interrupts. * @retval status: - 0 Function succeeded. * - 1 Function failed. */ uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb) { - 8000b76: b580 push {r7, lr} - 8000b78: b082 sub sp, #8 - 8000b7a: af00 add r7, sp, #0 - 8000b7c: 6078 str r0, [r7, #4] + 8000bfe: b580 push {r7, lr} + 8000c00: b082 sub sp, #8 + 8000c02: af00 add r7, sp, #0 + 8000c04: 6078 str r0, [r7, #4] return SysTick_Config(TicksNumb); - 8000b7e: 6878 ldr r0, [r7, #4] - 8000b80: f7ff ffb0 bl 8000ae4 - 8000b84: 4603 mov r3, r0 + 8000c06: 6878 ldr r0, [r7, #4] + 8000c08: f7ff ffb0 bl 8000b6c + 8000c0c: 4603 mov r3, r0 } - 8000b86: 4618 mov r0, r3 - 8000b88: 3708 adds r7, #8 - 8000b8a: 46bd mov sp, r7 - 8000b8c: bd80 pop {r7, pc} + 8000c0e: 4618 mov r0, r3 + 8000c10: 3708 adds r7, #8 + 8000c12: 46bd mov sp, r7 + 8000c14: bd80 pop {r7, pc} ... -08000b90 : +08000c18 : * @param GPIO_Init pointer to a GPIO_InitTypeDef structure that contains * the configuration information for the specified GPIO peripheral. * @retval None */ void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) { - 8000b90: b480 push {r7} - 8000b92: b089 sub sp, #36 ; 0x24 - 8000b94: af00 add r7, sp, #0 - 8000b96: 6078 str r0, [r7, #4] - 8000b98: 6039 str r1, [r7, #0] + 8000c18: b480 push {r7} + 8000c1a: b089 sub sp, #36 ; 0x24 + 8000c1c: af00 add r7, sp, #0 + 8000c1e: 6078 str r0, [r7, #4] + 8000c20: 6039 str r1, [r7, #0] uint32_t position; uint32_t ioposition = 0x00U; - 8000b9a: 2300 movs r3, #0 - 8000b9c: 617b str r3, [r7, #20] + 8000c22: 2300 movs r3, #0 + 8000c24: 617b str r3, [r7, #20] uint32_t iocurrent = 0x00U; - 8000b9e: 2300 movs r3, #0 - 8000ba0: 613b str r3, [r7, #16] + 8000c26: 2300 movs r3, #0 + 8000c28: 613b str r3, [r7, #16] uint32_t temp = 0x00U; - 8000ba2: 2300 movs r3, #0 - 8000ba4: 61bb str r3, [r7, #24] + 8000c2a: 2300 movs r3, #0 + 8000c2c: 61bb str r3, [r7, #24] assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); assert_param(IS_GPIO_PIN(GPIO_Init->Pin)); assert_param(IS_GPIO_MODE(GPIO_Init->Mode)); /* Configure the port pins */ for(position = 0U; position < GPIO_NUMBER; position++) - 8000ba6: 2300 movs r3, #0 - 8000ba8: 61fb str r3, [r7, #28] - 8000baa: e159 b.n 8000e60 + 8000c2e: 2300 movs r3, #0 + 8000c30: 61fb str r3, [r7, #28] + 8000c32: e159 b.n 8000ee8 { /* Get the IO position */ ioposition = 0x01U << position; - 8000bac: 2201 movs r2, #1 - 8000bae: 69fb ldr r3, [r7, #28] - 8000bb0: fa02 f303 lsl.w r3, r2, r3 - 8000bb4: 617b str r3, [r7, #20] + 8000c34: 2201 movs r2, #1 + 8000c36: 69fb ldr r3, [r7, #28] + 8000c38: fa02 f303 lsl.w r3, r2, r3 + 8000c3c: 617b str r3, [r7, #20] /* Get the current IO position */ iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition; - 8000bb6: 683b ldr r3, [r7, #0] - 8000bb8: 681b ldr r3, [r3, #0] - 8000bba: 697a ldr r2, [r7, #20] - 8000bbc: 4013 ands r3, r2 - 8000bbe: 613b str r3, [r7, #16] + 8000c3e: 683b ldr r3, [r7, #0] + 8000c40: 681b ldr r3, [r3, #0] + 8000c42: 697a ldr r2, [r7, #20] + 8000c44: 4013 ands r3, r2 + 8000c46: 613b str r3, [r7, #16] if(iocurrent == ioposition) - 8000bc0: 693a ldr r2, [r7, #16] - 8000bc2: 697b ldr r3, [r7, #20] - 8000bc4: 429a cmp r2, r3 - 8000bc6: f040 8148 bne.w 8000e5a + 8000c48: 693a ldr r2, [r7, #16] + 8000c4a: 697b ldr r3, [r7, #20] + 8000c4c: 429a cmp r2, r3 + 8000c4e: f040 8148 bne.w 8000ee2 { /*--------------------- GPIO Mode Configuration ------------------------*/ /* In case of Output or Alternate function mode selection */ if(((GPIO_Init->Mode & GPIO_MODE) == MODE_OUTPUT) || \ - 8000bca: 683b ldr r3, [r7, #0] - 8000bcc: 685b ldr r3, [r3, #4] - 8000bce: f003 0303 and.w r3, r3, #3 - 8000bd2: 2b01 cmp r3, #1 - 8000bd4: d005 beq.n 8000be2 + 8000c52: 683b ldr r3, [r7, #0] + 8000c54: 685b ldr r3, [r3, #4] + 8000c56: f003 0303 and.w r3, r3, #3 + 8000c5a: 2b01 cmp r3, #1 + 8000c5c: d005 beq.n 8000c6a (GPIO_Init->Mode & GPIO_MODE) == MODE_AF) - 8000bd6: 683b ldr r3, [r7, #0] - 8000bd8: 685b ldr r3, [r3, #4] - 8000bda: f003 0303 and.w r3, r3, #3 + 8000c5e: 683b ldr r3, [r7, #0] + 8000c60: 685b ldr r3, [r3, #4] + 8000c62: f003 0303 and.w r3, r3, #3 if(((GPIO_Init->Mode & GPIO_MODE) == MODE_OUTPUT) || \ - 8000bde: 2b02 cmp r3, #2 - 8000be0: d130 bne.n 8000c44 + 8000c66: 2b02 cmp r3, #2 + 8000c68: d130 bne.n 8000ccc { /* Check the Speed parameter */ assert_param(IS_GPIO_SPEED(GPIO_Init->Speed)); /* Configure the IO Speed */ temp = GPIOx->OSPEEDR; - 8000be2: 687b ldr r3, [r7, #4] - 8000be4: 689b ldr r3, [r3, #8] - 8000be6: 61bb str r3, [r7, #24] + 8000c6a: 687b ldr r3, [r7, #4] + 8000c6c: 689b ldr r3, [r3, #8] + 8000c6e: 61bb str r3, [r7, #24] temp &= ~(GPIO_OSPEEDER_OSPEEDR0 << (position * 2U)); - 8000be8: 69fb ldr r3, [r7, #28] - 8000bea: 005b lsls r3, r3, #1 - 8000bec: 2203 movs r2, #3 - 8000bee: fa02 f303 lsl.w r3, r2, r3 - 8000bf2: 43db mvns r3, r3 - 8000bf4: 69ba ldr r2, [r7, #24] - 8000bf6: 4013 ands r3, r2 - 8000bf8: 61bb str r3, [r7, #24] + 8000c70: 69fb ldr r3, [r7, #28] + 8000c72: 005b lsls r3, r3, #1 + 8000c74: 2203 movs r2, #3 + 8000c76: fa02 f303 lsl.w r3, r2, r3 + 8000c7a: 43db mvns r3, r3 + 8000c7c: 69ba ldr r2, [r7, #24] + 8000c7e: 4013 ands r3, r2 + 8000c80: 61bb str r3, [r7, #24] temp |= (GPIO_Init->Speed << (position * 2U)); - 8000bfa: 683b ldr r3, [r7, #0] - 8000bfc: 68da ldr r2, [r3, #12] - 8000bfe: 69fb ldr r3, [r7, #28] - 8000c00: 005b lsls r3, r3, #1 - 8000c02: fa02 f303 lsl.w r3, r2, r3 - 8000c06: 69ba ldr r2, [r7, #24] - 8000c08: 4313 orrs r3, r2 - 8000c0a: 61bb str r3, [r7, #24] + 8000c82: 683b ldr r3, [r7, #0] + 8000c84: 68da ldr r2, [r3, #12] + 8000c86: 69fb ldr r3, [r7, #28] + 8000c88: 005b lsls r3, r3, #1 + 8000c8a: fa02 f303 lsl.w r3, r2, r3 + 8000c8e: 69ba ldr r2, [r7, #24] + 8000c90: 4313 orrs r3, r2 + 8000c92: 61bb str r3, [r7, #24] GPIOx->OSPEEDR = temp; - 8000c0c: 687b ldr r3, [r7, #4] - 8000c0e: 69ba ldr r2, [r7, #24] - 8000c10: 609a str r2, [r3, #8] + 8000c94: 687b ldr r3, [r7, #4] + 8000c96: 69ba ldr r2, [r7, #24] + 8000c98: 609a str r2, [r3, #8] /* Configure the IO Output Type */ temp = GPIOx->OTYPER; - 8000c12: 687b ldr r3, [r7, #4] - 8000c14: 685b ldr r3, [r3, #4] - 8000c16: 61bb str r3, [r7, #24] + 8000c9a: 687b ldr r3, [r7, #4] + 8000c9c: 685b ldr r3, [r3, #4] + 8000c9e: 61bb str r3, [r7, #24] temp &= ~(GPIO_OTYPER_OT_0 << position) ; - 8000c18: 2201 movs r2, #1 - 8000c1a: 69fb ldr r3, [r7, #28] - 8000c1c: fa02 f303 lsl.w r3, r2, r3 - 8000c20: 43db mvns r3, r3 - 8000c22: 69ba ldr r2, [r7, #24] - 8000c24: 4013 ands r3, r2 - 8000c26: 61bb str r3, [r7, #24] + 8000ca0: 2201 movs r2, #1 + 8000ca2: 69fb ldr r3, [r7, #28] + 8000ca4: fa02 f303 lsl.w r3, r2, r3 + 8000ca8: 43db mvns r3, r3 + 8000caa: 69ba ldr r2, [r7, #24] + 8000cac: 4013 ands r3, r2 + 8000cae: 61bb str r3, [r7, #24] temp |= (((GPIO_Init->Mode & OUTPUT_TYPE) >> OUTPUT_TYPE_Pos) << position); - 8000c28: 683b ldr r3, [r7, #0] - 8000c2a: 685b ldr r3, [r3, #4] - 8000c2c: 091b lsrs r3, r3, #4 - 8000c2e: f003 0201 and.w r2, r3, #1 - 8000c32: 69fb ldr r3, [r7, #28] - 8000c34: fa02 f303 lsl.w r3, r2, r3 - 8000c38: 69ba ldr r2, [r7, #24] - 8000c3a: 4313 orrs r3, r2 - 8000c3c: 61bb str r3, [r7, #24] + 8000cb0: 683b ldr r3, [r7, #0] + 8000cb2: 685b ldr r3, [r3, #4] + 8000cb4: 091b lsrs r3, r3, #4 + 8000cb6: f003 0201 and.w r2, r3, #1 + 8000cba: 69fb ldr r3, [r7, #28] + 8000cbc: fa02 f303 lsl.w r3, r2, r3 + 8000cc0: 69ba ldr r2, [r7, #24] + 8000cc2: 4313 orrs r3, r2 + 8000cc4: 61bb str r3, [r7, #24] GPIOx->OTYPER = temp; - 8000c3e: 687b ldr r3, [r7, #4] - 8000c40: 69ba ldr r2, [r7, #24] - 8000c42: 605a str r2, [r3, #4] + 8000cc6: 687b ldr r3, [r7, #4] + 8000cc8: 69ba ldr r2, [r7, #24] + 8000cca: 605a str r2, [r3, #4] } if((GPIO_Init->Mode & GPIO_MODE) != MODE_ANALOG) - 8000c44: 683b ldr r3, [r7, #0] - 8000c46: 685b ldr r3, [r3, #4] - 8000c48: f003 0303 and.w r3, r3, #3 - 8000c4c: 2b03 cmp r3, #3 - 8000c4e: d017 beq.n 8000c80 + 8000ccc: 683b ldr r3, [r7, #0] + 8000cce: 685b ldr r3, [r3, #4] + 8000cd0: f003 0303 and.w r3, r3, #3 + 8000cd4: 2b03 cmp r3, #3 + 8000cd6: d017 beq.n 8000d08 { /* Check the parameters */ assert_param(IS_GPIO_PULL(GPIO_Init->Pull)); /* Activate the Pull-up or Pull down resistor for the current IO */ temp = GPIOx->PUPDR; - 8000c50: 687b ldr r3, [r7, #4] - 8000c52: 68db ldr r3, [r3, #12] - 8000c54: 61bb str r3, [r7, #24] + 8000cd8: 687b ldr r3, [r7, #4] + 8000cda: 68db ldr r3, [r3, #12] + 8000cdc: 61bb str r3, [r7, #24] temp &= ~(GPIO_PUPDR_PUPDR0 << (position * 2U)); - 8000c56: 69fb ldr r3, [r7, #28] - 8000c58: 005b lsls r3, r3, #1 - 8000c5a: 2203 movs r2, #3 - 8000c5c: fa02 f303 lsl.w r3, r2, r3 - 8000c60: 43db mvns r3, r3 - 8000c62: 69ba ldr r2, [r7, #24] - 8000c64: 4013 ands r3, r2 - 8000c66: 61bb str r3, [r7, #24] + 8000cde: 69fb ldr r3, [r7, #28] + 8000ce0: 005b lsls r3, r3, #1 + 8000ce2: 2203 movs r2, #3 + 8000ce4: fa02 f303 lsl.w r3, r2, r3 + 8000ce8: 43db mvns r3, r3 + 8000cea: 69ba ldr r2, [r7, #24] + 8000cec: 4013 ands r3, r2 + 8000cee: 61bb str r3, [r7, #24] temp |= ((GPIO_Init->Pull) << (position * 2U)); - 8000c68: 683b ldr r3, [r7, #0] - 8000c6a: 689a ldr r2, [r3, #8] - 8000c6c: 69fb ldr r3, [r7, #28] - 8000c6e: 005b lsls r3, r3, #1 - 8000c70: fa02 f303 lsl.w r3, r2, r3 - 8000c74: 69ba ldr r2, [r7, #24] - 8000c76: 4313 orrs r3, r2 - 8000c78: 61bb str r3, [r7, #24] - GPIOx->PUPDR = temp; - 8000c7a: 687b ldr r3, [r7, #4] - 8000c7c: 69ba ldr r2, [r7, #24] - 8000c7e: 60da str r2, [r3, #12] - } - - /* In case of Alternate function mode selection */ - if((GPIO_Init->Mode & GPIO_MODE) == MODE_AF) - 8000c80: 683b ldr r3, [r7, #0] - 8000c82: 685b ldr r3, [r3, #4] - 8000c84: f003 0303 and.w r3, r3, #3 - 8000c88: 2b02 cmp r3, #2 - 8000c8a: d123 bne.n 8000cd4 - { - /* Check the Alternate function parameter */ - assert_param(IS_GPIO_AF(GPIO_Init->Alternate)); - /* Configure Alternate function mapped with the current IO */ - temp = GPIOx->AFR[position >> 3U]; - 8000c8c: 69fb ldr r3, [r7, #28] - 8000c8e: 08da lsrs r2, r3, #3 - 8000c90: 687b ldr r3, [r7, #4] - 8000c92: 3208 adds r2, #8 - 8000c94: f853 3022 ldr.w r3, [r3, r2, lsl #2] - 8000c98: 61bb str r3, [r7, #24] - temp &= ~(0xFU << ((uint32_t)(position & 0x07U) * 4U)) ; - 8000c9a: 69fb ldr r3, [r7, #28] - 8000c9c: f003 0307 and.w r3, r3, #7 - 8000ca0: 009b lsls r3, r3, #2 - 8000ca2: 220f movs r2, #15 - 8000ca4: fa02 f303 lsl.w r3, r2, r3 - 8000ca8: 43db mvns r3, r3 - 8000caa: 69ba ldr r2, [r7, #24] - 8000cac: 4013 ands r3, r2 - 8000cae: 61bb str r3, [r7, #24] - temp |= ((uint32_t)(GPIO_Init->Alternate) << (((uint32_t)position & 0x07U) * 4U)); - 8000cb0: 683b ldr r3, [r7, #0] - 8000cb2: 691a ldr r2, [r3, #16] - 8000cb4: 69fb ldr r3, [r7, #28] - 8000cb6: f003 0307 and.w r3, r3, #7 - 8000cba: 009b lsls r3, r3, #2 - 8000cbc: fa02 f303 lsl.w r3, r2, r3 - 8000cc0: 69ba ldr r2, [r7, #24] - 8000cc2: 4313 orrs r3, r2 - 8000cc4: 61bb str r3, [r7, #24] - GPIOx->AFR[position >> 3U] = temp; - 8000cc6: 69fb ldr r3, [r7, #28] - 8000cc8: 08da lsrs r2, r3, #3 - 8000cca: 687b ldr r3, [r7, #4] - 8000ccc: 3208 adds r2, #8 - 8000cce: 69b9 ldr r1, [r7, #24] - 8000cd0: f843 1022 str.w r1, [r3, r2, lsl #2] - } - - /* Configure IO Direction mode (Input, Output, Alternate or Analog) */ - temp = GPIOx->MODER; - 8000cd4: 687b ldr r3, [r7, #4] - 8000cd6: 681b ldr r3, [r3, #0] - 8000cd8: 61bb str r3, [r7, #24] - temp &= ~(GPIO_MODER_MODER0 << (position * 2U)); - 8000cda: 69fb ldr r3, [r7, #28] - 8000cdc: 005b lsls r3, r3, #1 - 8000cde: 2203 movs r2, #3 - 8000ce0: fa02 f303 lsl.w r3, r2, r3 - 8000ce4: 43db mvns r3, r3 - 8000ce6: 69ba ldr r2, [r7, #24] - 8000ce8: 4013 ands r3, r2 - 8000cea: 61bb str r3, [r7, #24] - temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2U)); - 8000cec: 683b ldr r3, [r7, #0] - 8000cee: 685b ldr r3, [r3, #4] - 8000cf0: f003 0203 and.w r2, r3, #3 + 8000cf0: 683b ldr r3, [r7, #0] + 8000cf2: 689a ldr r2, [r3, #8] 8000cf4: 69fb ldr r3, [r7, #28] 8000cf6: 005b lsls r3, r3, #1 8000cf8: fa02 f303 lsl.w r3, r2, r3 8000cfc: 69ba ldr r2, [r7, #24] 8000cfe: 4313 orrs r3, r2 8000d00: 61bb str r3, [r7, #24] - GPIOx->MODER = temp; + GPIOx->PUPDR = temp; 8000d02: 687b ldr r3, [r7, #4] 8000d04: 69ba ldr r2, [r7, #24] - 8000d06: 601a str r2, [r3, #0] + 8000d06: 60da str r2, [r3, #12] + } + + /* In case of Alternate function mode selection */ + if((GPIO_Init->Mode & GPIO_MODE) == MODE_AF) + 8000d08: 683b ldr r3, [r7, #0] + 8000d0a: 685b ldr r3, [r3, #4] + 8000d0c: f003 0303 and.w r3, r3, #3 + 8000d10: 2b02 cmp r3, #2 + 8000d12: d123 bne.n 8000d5c + { + /* Check the Alternate function parameter */ + assert_param(IS_GPIO_AF(GPIO_Init->Alternate)); + /* Configure Alternate function mapped with the current IO */ + temp = GPIOx->AFR[position >> 3U]; + 8000d14: 69fb ldr r3, [r7, #28] + 8000d16: 08da lsrs r2, r3, #3 + 8000d18: 687b ldr r3, [r7, #4] + 8000d1a: 3208 adds r2, #8 + 8000d1c: f853 3022 ldr.w r3, [r3, r2, lsl #2] + 8000d20: 61bb str r3, [r7, #24] + temp &= ~(0xFU << ((uint32_t)(position & 0x07U) * 4U)) ; + 8000d22: 69fb ldr r3, [r7, #28] + 8000d24: f003 0307 and.w r3, r3, #7 + 8000d28: 009b lsls r3, r3, #2 + 8000d2a: 220f movs r2, #15 + 8000d2c: fa02 f303 lsl.w r3, r2, r3 + 8000d30: 43db mvns r3, r3 + 8000d32: 69ba ldr r2, [r7, #24] + 8000d34: 4013 ands r3, r2 + 8000d36: 61bb str r3, [r7, #24] + temp |= ((uint32_t)(GPIO_Init->Alternate) << (((uint32_t)position & 0x07U) * 4U)); + 8000d38: 683b ldr r3, [r7, #0] + 8000d3a: 691a ldr r2, [r3, #16] + 8000d3c: 69fb ldr r3, [r7, #28] + 8000d3e: f003 0307 and.w r3, r3, #7 + 8000d42: 009b lsls r3, r3, #2 + 8000d44: fa02 f303 lsl.w r3, r2, r3 + 8000d48: 69ba ldr r2, [r7, #24] + 8000d4a: 4313 orrs r3, r2 + 8000d4c: 61bb str r3, [r7, #24] + GPIOx->AFR[position >> 3U] = temp; + 8000d4e: 69fb ldr r3, [r7, #28] + 8000d50: 08da lsrs r2, r3, #3 + 8000d52: 687b ldr r3, [r7, #4] + 8000d54: 3208 adds r2, #8 + 8000d56: 69b9 ldr r1, [r7, #24] + 8000d58: f843 1022 str.w r1, [r3, r2, lsl #2] + } + + /* Configure IO Direction mode (Input, Output, Alternate or Analog) */ + temp = GPIOx->MODER; + 8000d5c: 687b ldr r3, [r7, #4] + 8000d5e: 681b ldr r3, [r3, #0] + 8000d60: 61bb str r3, [r7, #24] + temp &= ~(GPIO_MODER_MODER0 << (position * 2U)); + 8000d62: 69fb ldr r3, [r7, #28] + 8000d64: 005b lsls r3, r3, #1 + 8000d66: 2203 movs r2, #3 + 8000d68: fa02 f303 lsl.w r3, r2, r3 + 8000d6c: 43db mvns r3, r3 + 8000d6e: 69ba ldr r2, [r7, #24] + 8000d70: 4013 ands r3, r2 + 8000d72: 61bb str r3, [r7, #24] + temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2U)); + 8000d74: 683b ldr r3, [r7, #0] + 8000d76: 685b ldr r3, [r3, #4] + 8000d78: f003 0203 and.w r2, r3, #3 + 8000d7c: 69fb ldr r3, [r7, #28] + 8000d7e: 005b lsls r3, r3, #1 + 8000d80: fa02 f303 lsl.w r3, r2, r3 + 8000d84: 69ba ldr r2, [r7, #24] + 8000d86: 4313 orrs r3, r2 + 8000d88: 61bb str r3, [r7, #24] + GPIOx->MODER = temp; + 8000d8a: 687b ldr r3, [r7, #4] + 8000d8c: 69ba ldr r2, [r7, #24] + 8000d8e: 601a str r2, [r3, #0] /*--------------------- EXTI Mode Configuration ------------------------*/ /* Configure the External Interrupt or event for the current IO */ if((GPIO_Init->Mode & EXTI_MODE) != 0x00U) - 8000d08: 683b ldr r3, [r7, #0] - 8000d0a: 685b ldr r3, [r3, #4] - 8000d0c: f403 3340 and.w r3, r3, #196608 ; 0x30000 - 8000d10: 2b00 cmp r3, #0 - 8000d12: f000 80a2 beq.w 8000e5a + 8000d90: 683b ldr r3, [r7, #0] + 8000d92: 685b ldr r3, [r3, #4] + 8000d94: f403 3340 and.w r3, r3, #196608 ; 0x30000 + 8000d98: 2b00 cmp r3, #0 + 8000d9a: f000 80a2 beq.w 8000ee2 { /* Enable SYSCFG Clock */ __HAL_RCC_SYSCFG_CLK_ENABLE(); - 8000d16: 2300 movs r3, #0 - 8000d18: 60fb str r3, [r7, #12] - 8000d1a: 4b57 ldr r3, [pc, #348] ; (8000e78 ) - 8000d1c: 6c5b ldr r3, [r3, #68] ; 0x44 - 8000d1e: 4a56 ldr r2, [pc, #344] ; (8000e78 ) - 8000d20: f443 4380 orr.w r3, r3, #16384 ; 0x4000 - 8000d24: 6453 str r3, [r2, #68] ; 0x44 - 8000d26: 4b54 ldr r3, [pc, #336] ; (8000e78 ) - 8000d28: 6c5b ldr r3, [r3, #68] ; 0x44 - 8000d2a: f403 4380 and.w r3, r3, #16384 ; 0x4000 - 8000d2e: 60fb str r3, [r7, #12] - 8000d30: 68fb ldr r3, [r7, #12] + 8000d9e: 2300 movs r3, #0 + 8000da0: 60fb str r3, [r7, #12] + 8000da2: 4b57 ldr r3, [pc, #348] ; (8000f00 ) + 8000da4: 6c5b ldr r3, [r3, #68] ; 0x44 + 8000da6: 4a56 ldr r2, [pc, #344] ; (8000f00 ) + 8000da8: f443 4380 orr.w r3, r3, #16384 ; 0x4000 + 8000dac: 6453 str r3, [r2, #68] ; 0x44 + 8000dae: 4b54 ldr r3, [pc, #336] ; (8000f00 ) + 8000db0: 6c5b ldr r3, [r3, #68] ; 0x44 + 8000db2: f403 4380 and.w r3, r3, #16384 ; 0x4000 + 8000db6: 60fb str r3, [r7, #12] + 8000db8: 68fb ldr r3, [r7, #12] temp = SYSCFG->EXTICR[position >> 2U]; - 8000d32: 4a52 ldr r2, [pc, #328] ; (8000e7c ) - 8000d34: 69fb ldr r3, [r7, #28] - 8000d36: 089b lsrs r3, r3, #2 - 8000d38: 3302 adds r3, #2 - 8000d3a: f852 3023 ldr.w r3, [r2, r3, lsl #2] - 8000d3e: 61bb str r3, [r7, #24] + 8000dba: 4a52 ldr r2, [pc, #328] ; (8000f04 ) + 8000dbc: 69fb ldr r3, [r7, #28] + 8000dbe: 089b lsrs r3, r3, #2 + 8000dc0: 3302 adds r3, #2 + 8000dc2: f852 3023 ldr.w r3, [r2, r3, lsl #2] + 8000dc6: 61bb str r3, [r7, #24] temp &= ~(0x0FU << (4U * (position & 0x03U))); - 8000d40: 69fb ldr r3, [r7, #28] - 8000d42: f003 0303 and.w r3, r3, #3 - 8000d46: 009b lsls r3, r3, #2 - 8000d48: 220f movs r2, #15 - 8000d4a: fa02 f303 lsl.w r3, r2, r3 - 8000d4e: 43db mvns r3, r3 - 8000d50: 69ba ldr r2, [r7, #24] - 8000d52: 4013 ands r3, r2 - 8000d54: 61bb str r3, [r7, #24] + 8000dc8: 69fb ldr r3, [r7, #28] + 8000dca: f003 0303 and.w r3, r3, #3 + 8000dce: 009b lsls r3, r3, #2 + 8000dd0: 220f movs r2, #15 + 8000dd2: fa02 f303 lsl.w r3, r2, r3 + 8000dd6: 43db mvns r3, r3 + 8000dd8: 69ba ldr r2, [r7, #24] + 8000dda: 4013 ands r3, r2 + 8000ddc: 61bb str r3, [r7, #24] temp |= ((uint32_t)(GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U))); - 8000d56: 687b ldr r3, [r7, #4] - 8000d58: 4a49 ldr r2, [pc, #292] ; (8000e80 ) - 8000d5a: 4293 cmp r3, r2 - 8000d5c: d019 beq.n 8000d92 - 8000d5e: 687b ldr r3, [r7, #4] - 8000d60: 4a48 ldr r2, [pc, #288] ; (8000e84 ) - 8000d62: 4293 cmp r3, r2 - 8000d64: d013 beq.n 8000d8e - 8000d66: 687b ldr r3, [r7, #4] - 8000d68: 4a47 ldr r2, [pc, #284] ; (8000e88 ) - 8000d6a: 4293 cmp r3, r2 - 8000d6c: d00d beq.n 8000d8a - 8000d6e: 687b ldr r3, [r7, #4] - 8000d70: 4a46 ldr r2, [pc, #280] ; (8000e8c ) - 8000d72: 4293 cmp r3, r2 - 8000d74: d007 beq.n 8000d86 - 8000d76: 687b ldr r3, [r7, #4] - 8000d78: 4a45 ldr r2, [pc, #276] ; (8000e90 ) - 8000d7a: 4293 cmp r3, r2 - 8000d7c: d101 bne.n 8000d82 - 8000d7e: 2304 movs r3, #4 - 8000d80: e008 b.n 8000d94 - 8000d82: 2307 movs r3, #7 - 8000d84: e006 b.n 8000d94 - 8000d86: 2303 movs r3, #3 - 8000d88: e004 b.n 8000d94 - 8000d8a: 2302 movs r3, #2 - 8000d8c: e002 b.n 8000d94 - 8000d8e: 2301 movs r3, #1 - 8000d90: e000 b.n 8000d94 - 8000d92: 2300 movs r3, #0 - 8000d94: 69fa ldr r2, [r7, #28] - 8000d96: f002 0203 and.w r2, r2, #3 - 8000d9a: 0092 lsls r2, r2, #2 - 8000d9c: 4093 lsls r3, r2 - 8000d9e: 69ba ldr r2, [r7, #24] - 8000da0: 4313 orrs r3, r2 - 8000da2: 61bb str r3, [r7, #24] + 8000dde: 687b ldr r3, [r7, #4] + 8000de0: 4a49 ldr r2, [pc, #292] ; (8000f08 ) + 8000de2: 4293 cmp r3, r2 + 8000de4: d019 beq.n 8000e1a + 8000de6: 687b ldr r3, [r7, #4] + 8000de8: 4a48 ldr r2, [pc, #288] ; (8000f0c ) + 8000dea: 4293 cmp r3, r2 + 8000dec: d013 beq.n 8000e16 + 8000dee: 687b ldr r3, [r7, #4] + 8000df0: 4a47 ldr r2, [pc, #284] ; (8000f10 ) + 8000df2: 4293 cmp r3, r2 + 8000df4: d00d beq.n 8000e12 + 8000df6: 687b ldr r3, [r7, #4] + 8000df8: 4a46 ldr r2, [pc, #280] ; (8000f14 ) + 8000dfa: 4293 cmp r3, r2 + 8000dfc: d007 beq.n 8000e0e + 8000dfe: 687b ldr r3, [r7, #4] + 8000e00: 4a45 ldr r2, [pc, #276] ; (8000f18 ) + 8000e02: 4293 cmp r3, r2 + 8000e04: d101 bne.n 8000e0a + 8000e06: 2304 movs r3, #4 + 8000e08: e008 b.n 8000e1c + 8000e0a: 2307 movs r3, #7 + 8000e0c: e006 b.n 8000e1c + 8000e0e: 2303 movs r3, #3 + 8000e10: e004 b.n 8000e1c + 8000e12: 2302 movs r3, #2 + 8000e14: e002 b.n 8000e1c + 8000e16: 2301 movs r3, #1 + 8000e18: e000 b.n 8000e1c + 8000e1a: 2300 movs r3, #0 + 8000e1c: 69fa ldr r2, [r7, #28] + 8000e1e: f002 0203 and.w r2, r2, #3 + 8000e22: 0092 lsls r2, r2, #2 + 8000e24: 4093 lsls r3, r2 + 8000e26: 69ba ldr r2, [r7, #24] + 8000e28: 4313 orrs r3, r2 + 8000e2a: 61bb str r3, [r7, #24] SYSCFG->EXTICR[position >> 2U] = temp; - 8000da4: 4935 ldr r1, [pc, #212] ; (8000e7c ) - 8000da6: 69fb ldr r3, [r7, #28] - 8000da8: 089b lsrs r3, r3, #2 - 8000daa: 3302 adds r3, #2 - 8000dac: 69ba ldr r2, [r7, #24] - 8000dae: f841 2023 str.w r2, [r1, r3, lsl #2] + 8000e2c: 4935 ldr r1, [pc, #212] ; (8000f04 ) + 8000e2e: 69fb ldr r3, [r7, #28] + 8000e30: 089b lsrs r3, r3, #2 + 8000e32: 3302 adds r3, #2 + 8000e34: 69ba ldr r2, [r7, #24] + 8000e36: f841 2023 str.w r2, [r1, r3, lsl #2] /* Clear Rising Falling edge configuration */ temp = EXTI->RTSR; - 8000db2: 4b38 ldr r3, [pc, #224] ; (8000e94 ) - 8000db4: 689b ldr r3, [r3, #8] - 8000db6: 61bb str r3, [r7, #24] + 8000e3a: 4b38 ldr r3, [pc, #224] ; (8000f1c ) + 8000e3c: 689b ldr r3, [r3, #8] + 8000e3e: 61bb str r3, [r7, #24] temp &= ~((uint32_t)iocurrent); - 8000db8: 693b ldr r3, [r7, #16] - 8000dba: 43db mvns r3, r3 - 8000dbc: 69ba ldr r2, [r7, #24] - 8000dbe: 4013 ands r3, r2 - 8000dc0: 61bb str r3, [r7, #24] + 8000e40: 693b ldr r3, [r7, #16] + 8000e42: 43db mvns r3, r3 + 8000e44: 69ba ldr r2, [r7, #24] + 8000e46: 4013 ands r3, r2 + 8000e48: 61bb str r3, [r7, #24] if((GPIO_Init->Mode & TRIGGER_RISING) != 0x00U) - 8000dc2: 683b ldr r3, [r7, #0] - 8000dc4: 685b ldr r3, [r3, #4] - 8000dc6: f403 1380 and.w r3, r3, #1048576 ; 0x100000 - 8000dca: 2b00 cmp r3, #0 - 8000dcc: d003 beq.n 8000dd6 + 8000e4a: 683b ldr r3, [r7, #0] + 8000e4c: 685b ldr r3, [r3, #4] + 8000e4e: f403 1380 and.w r3, r3, #1048576 ; 0x100000 + 8000e52: 2b00 cmp r3, #0 + 8000e54: d003 beq.n 8000e5e { temp |= iocurrent; - 8000dce: 69ba ldr r2, [r7, #24] - 8000dd0: 693b ldr r3, [r7, #16] - 8000dd2: 4313 orrs r3, r2 - 8000dd4: 61bb str r3, [r7, #24] + 8000e56: 69ba ldr r2, [r7, #24] + 8000e58: 693b ldr r3, [r7, #16] + 8000e5a: 4313 orrs r3, r2 + 8000e5c: 61bb str r3, [r7, #24] } EXTI->RTSR = temp; - 8000dd6: 4a2f ldr r2, [pc, #188] ; (8000e94 ) - 8000dd8: 69bb ldr r3, [r7, #24] - 8000dda: 6093 str r3, [r2, #8] + 8000e5e: 4a2f ldr r2, [pc, #188] ; (8000f1c ) + 8000e60: 69bb ldr r3, [r7, #24] + 8000e62: 6093 str r3, [r2, #8] temp = EXTI->FTSR; - 8000ddc: 4b2d ldr r3, [pc, #180] ; (8000e94 ) - 8000dde: 68db ldr r3, [r3, #12] - 8000de0: 61bb str r3, [r7, #24] + 8000e64: 4b2d ldr r3, [pc, #180] ; (8000f1c ) + 8000e66: 68db ldr r3, [r3, #12] + 8000e68: 61bb str r3, [r7, #24] temp &= ~((uint32_t)iocurrent); - 8000de2: 693b ldr r3, [r7, #16] - 8000de4: 43db mvns r3, r3 - 8000de6: 69ba ldr r2, [r7, #24] - 8000de8: 4013 ands r3, r2 - 8000dea: 61bb str r3, [r7, #24] + 8000e6a: 693b ldr r3, [r7, #16] + 8000e6c: 43db mvns r3, r3 + 8000e6e: 69ba ldr r2, [r7, #24] + 8000e70: 4013 ands r3, r2 + 8000e72: 61bb str r3, [r7, #24] if((GPIO_Init->Mode & TRIGGER_FALLING) != 0x00U) - 8000dec: 683b ldr r3, [r7, #0] - 8000dee: 685b ldr r3, [r3, #4] - 8000df0: f403 1300 and.w r3, r3, #2097152 ; 0x200000 - 8000df4: 2b00 cmp r3, #0 - 8000df6: d003 beq.n 8000e00 + 8000e74: 683b ldr r3, [r7, #0] + 8000e76: 685b ldr r3, [r3, #4] + 8000e78: f403 1300 and.w r3, r3, #2097152 ; 0x200000 + 8000e7c: 2b00 cmp r3, #0 + 8000e7e: d003 beq.n 8000e88 { temp |= iocurrent; - 8000df8: 69ba ldr r2, [r7, #24] - 8000dfa: 693b ldr r3, [r7, #16] - 8000dfc: 4313 orrs r3, r2 - 8000dfe: 61bb str r3, [r7, #24] + 8000e80: 69ba ldr r2, [r7, #24] + 8000e82: 693b ldr r3, [r7, #16] + 8000e84: 4313 orrs r3, r2 + 8000e86: 61bb str r3, [r7, #24] } EXTI->FTSR = temp; - 8000e00: 4a24 ldr r2, [pc, #144] ; (8000e94 ) - 8000e02: 69bb ldr r3, [r7, #24] - 8000e04: 60d3 str r3, [r2, #12] + 8000e88: 4a24 ldr r2, [pc, #144] ; (8000f1c ) + 8000e8a: 69bb ldr r3, [r7, #24] + 8000e8c: 60d3 str r3, [r2, #12] temp = EXTI->EMR; - 8000e06: 4b23 ldr r3, [pc, #140] ; (8000e94 ) - 8000e08: 685b ldr r3, [r3, #4] - 8000e0a: 61bb str r3, [r7, #24] + 8000e8e: 4b23 ldr r3, [pc, #140] ; (8000f1c ) + 8000e90: 685b ldr r3, [r3, #4] + 8000e92: 61bb str r3, [r7, #24] temp &= ~((uint32_t)iocurrent); - 8000e0c: 693b ldr r3, [r7, #16] - 8000e0e: 43db mvns r3, r3 - 8000e10: 69ba ldr r2, [r7, #24] - 8000e12: 4013 ands r3, r2 - 8000e14: 61bb str r3, [r7, #24] + 8000e94: 693b ldr r3, [r7, #16] + 8000e96: 43db mvns r3, r3 + 8000e98: 69ba ldr r2, [r7, #24] + 8000e9a: 4013 ands r3, r2 + 8000e9c: 61bb str r3, [r7, #24] if((GPIO_Init->Mode & EXTI_EVT) != 0x00U) - 8000e16: 683b ldr r3, [r7, #0] - 8000e18: 685b ldr r3, [r3, #4] - 8000e1a: f403 3300 and.w r3, r3, #131072 ; 0x20000 - 8000e1e: 2b00 cmp r3, #0 - 8000e20: d003 beq.n 8000e2a + 8000e9e: 683b ldr r3, [r7, #0] + 8000ea0: 685b ldr r3, [r3, #4] + 8000ea2: f403 3300 and.w r3, r3, #131072 ; 0x20000 + 8000ea6: 2b00 cmp r3, #0 + 8000ea8: d003 beq.n 8000eb2 { temp |= iocurrent; - 8000e22: 69ba ldr r2, [r7, #24] - 8000e24: 693b ldr r3, [r7, #16] - 8000e26: 4313 orrs r3, r2 - 8000e28: 61bb str r3, [r7, #24] + 8000eaa: 69ba ldr r2, [r7, #24] + 8000eac: 693b ldr r3, [r7, #16] + 8000eae: 4313 orrs r3, r2 + 8000eb0: 61bb str r3, [r7, #24] } EXTI->EMR = temp; - 8000e2a: 4a1a ldr r2, [pc, #104] ; (8000e94 ) - 8000e2c: 69bb ldr r3, [r7, #24] - 8000e2e: 6053 str r3, [r2, #4] + 8000eb2: 4a1a ldr r2, [pc, #104] ; (8000f1c ) + 8000eb4: 69bb ldr r3, [r7, #24] + 8000eb6: 6053 str r3, [r2, #4] /* Clear EXTI line configuration */ temp = EXTI->IMR; - 8000e30: 4b18 ldr r3, [pc, #96] ; (8000e94 ) - 8000e32: 681b ldr r3, [r3, #0] - 8000e34: 61bb str r3, [r7, #24] + 8000eb8: 4b18 ldr r3, [pc, #96] ; (8000f1c ) + 8000eba: 681b ldr r3, [r3, #0] + 8000ebc: 61bb str r3, [r7, #24] temp &= ~((uint32_t)iocurrent); - 8000e36: 693b ldr r3, [r7, #16] - 8000e38: 43db mvns r3, r3 - 8000e3a: 69ba ldr r2, [r7, #24] - 8000e3c: 4013 ands r3, r2 - 8000e3e: 61bb str r3, [r7, #24] + 8000ebe: 693b ldr r3, [r7, #16] + 8000ec0: 43db mvns r3, r3 + 8000ec2: 69ba ldr r2, [r7, #24] + 8000ec4: 4013 ands r3, r2 + 8000ec6: 61bb str r3, [r7, #24] if((GPIO_Init->Mode & EXTI_IT) != 0x00U) - 8000e40: 683b ldr r3, [r7, #0] - 8000e42: 685b ldr r3, [r3, #4] - 8000e44: f403 3380 and.w r3, r3, #65536 ; 0x10000 - 8000e48: 2b00 cmp r3, #0 - 8000e4a: d003 beq.n 8000e54 + 8000ec8: 683b ldr r3, [r7, #0] + 8000eca: 685b ldr r3, [r3, #4] + 8000ecc: f403 3380 and.w r3, r3, #65536 ; 0x10000 + 8000ed0: 2b00 cmp r3, #0 + 8000ed2: d003 beq.n 8000edc { temp |= iocurrent; - 8000e4c: 69ba ldr r2, [r7, #24] - 8000e4e: 693b ldr r3, [r7, #16] - 8000e50: 4313 orrs r3, r2 - 8000e52: 61bb str r3, [r7, #24] + 8000ed4: 69ba ldr r2, [r7, #24] + 8000ed6: 693b ldr r3, [r7, #16] + 8000ed8: 4313 orrs r3, r2 + 8000eda: 61bb str r3, [r7, #24] } EXTI->IMR = temp; - 8000e54: 4a0f ldr r2, [pc, #60] ; (8000e94 ) - 8000e56: 69bb ldr r3, [r7, #24] - 8000e58: 6013 str r3, [r2, #0] + 8000edc: 4a0f ldr r2, [pc, #60] ; (8000f1c ) + 8000ede: 69bb ldr r3, [r7, #24] + 8000ee0: 6013 str r3, [r2, #0] for(position = 0U; position < GPIO_NUMBER; position++) - 8000e5a: 69fb ldr r3, [r7, #28] - 8000e5c: 3301 adds r3, #1 - 8000e5e: 61fb str r3, [r7, #28] - 8000e60: 69fb ldr r3, [r7, #28] - 8000e62: 2b0f cmp r3, #15 - 8000e64: f67f aea2 bls.w 8000bac + 8000ee2: 69fb ldr r3, [r7, #28] + 8000ee4: 3301 adds r3, #1 + 8000ee6: 61fb str r3, [r7, #28] + 8000ee8: 69fb ldr r3, [r7, #28] + 8000eea: 2b0f cmp r3, #15 + 8000eec: f67f aea2 bls.w 8000c34 } } } } - 8000e68: bf00 nop - 8000e6a: bf00 nop - 8000e6c: 3724 adds r7, #36 ; 0x24 - 8000e6e: 46bd mov sp, r7 - 8000e70: f85d 7b04 ldr.w r7, [sp], #4 - 8000e74: 4770 bx lr - 8000e76: bf00 nop - 8000e78: 40023800 .word 0x40023800 - 8000e7c: 40013800 .word 0x40013800 - 8000e80: 40020000 .word 0x40020000 - 8000e84: 40020400 .word 0x40020400 - 8000e88: 40020800 .word 0x40020800 - 8000e8c: 40020c00 .word 0x40020c00 - 8000e90: 40021000 .word 0x40021000 - 8000e94: 40013c00 .word 0x40013c00 + 8000ef0: bf00 nop + 8000ef2: bf00 nop + 8000ef4: 3724 adds r7, #36 ; 0x24 + 8000ef6: 46bd mov sp, r7 + 8000ef8: f85d 7b04 ldr.w r7, [sp], #4 + 8000efc: 4770 bx lr + 8000efe: bf00 nop + 8000f00: 40023800 .word 0x40023800 + 8000f04: 40013800 .word 0x40013800 + 8000f08: 40020000 .word 0x40020000 + 8000f0c: 40020400 .word 0x40020400 + 8000f10: 40020800 .word 0x40020800 + 8000f14: 40020c00 .word 0x40020c00 + 8000f18: 40021000 .word 0x40021000 + 8000f1c: 40013c00 .word 0x40013c00 -08000e98 : +08000f20 : + * @param GPIO_Pin specifies the port bit to read. + * This parameter can be GPIO_PIN_x where x can be (0..15). + * @retval The input port pin value. + */ +GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) +{ + 8000f20: b480 push {r7} + 8000f22: b085 sub sp, #20 + 8000f24: af00 add r7, sp, #0 + 8000f26: 6078 str r0, [r7, #4] + 8000f28: 460b mov r3, r1 + 8000f2a: 807b strh r3, [r7, #2] + GPIO_PinState bitstatus; + + /* Check the parameters */ + assert_param(IS_GPIO_PIN(GPIO_Pin)); + + if((GPIOx->IDR & GPIO_Pin) != (uint32_t)GPIO_PIN_RESET) + 8000f2c: 687b ldr r3, [r7, #4] + 8000f2e: 691a ldr r2, [r3, #16] + 8000f30: 887b ldrh r3, [r7, #2] + 8000f32: 4013 ands r3, r2 + 8000f34: 2b00 cmp r3, #0 + 8000f36: d002 beq.n 8000f3e + { + bitstatus = GPIO_PIN_SET; + 8000f38: 2301 movs r3, #1 + 8000f3a: 73fb strb r3, [r7, #15] + 8000f3c: e001 b.n 8000f42 + } + else + { + bitstatus = GPIO_PIN_RESET; + 8000f3e: 2300 movs r3, #0 + 8000f40: 73fb strb r3, [r7, #15] + } + return bitstatus; + 8000f42: 7bfb ldrb r3, [r7, #15] +} + 8000f44: 4618 mov r0, r3 + 8000f46: 3714 adds r7, #20 + 8000f48: 46bd mov sp, r7 + 8000f4a: f85d 7b04 ldr.w r7, [sp], #4 + 8000f4e: 4770 bx lr + +08000f50 : * @arg GPIO_PIN_RESET: to clear the port pin * @arg GPIO_PIN_SET: to set the port pin * @retval None */ void HAL_GPIO_WritePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState) { - 8000e98: b480 push {r7} - 8000e9a: b083 sub sp, #12 - 8000e9c: af00 add r7, sp, #0 - 8000e9e: 6078 str r0, [r7, #4] - 8000ea0: 460b mov r3, r1 - 8000ea2: 807b strh r3, [r7, #2] - 8000ea4: 4613 mov r3, r2 - 8000ea6: 707b strb r3, [r7, #1] + 8000f50: b480 push {r7} + 8000f52: b083 sub sp, #12 + 8000f54: af00 add r7, sp, #0 + 8000f56: 6078 str r0, [r7, #4] + 8000f58: 460b mov r3, r1 + 8000f5a: 807b strh r3, [r7, #2] + 8000f5c: 4613 mov r3, r2 + 8000f5e: 707b strb r3, [r7, #1] /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); assert_param(IS_GPIO_PIN_ACTION(PinState)); if(PinState != GPIO_PIN_RESET) - 8000ea8: 787b ldrb r3, [r7, #1] - 8000eaa: 2b00 cmp r3, #0 - 8000eac: d003 beq.n 8000eb6 + 8000f60: 787b ldrb r3, [r7, #1] + 8000f62: 2b00 cmp r3, #0 + 8000f64: d003 beq.n 8000f6e { GPIOx->BSRR = GPIO_Pin; - 8000eae: 887a ldrh r2, [r7, #2] - 8000eb0: 687b ldr r3, [r7, #4] - 8000eb2: 619a str r2, [r3, #24] + 8000f66: 887a ldrh r2, [r7, #2] + 8000f68: 687b ldr r3, [r7, #4] + 8000f6a: 619a str r2, [r3, #24] } else { GPIOx->BSRR = (uint32_t)GPIO_Pin << 16U; } } - 8000eb4: e003 b.n 8000ebe + 8000f6c: e003 b.n 8000f76 GPIOx->BSRR = (uint32_t)GPIO_Pin << 16U; - 8000eb6: 887b ldrh r3, [r7, #2] - 8000eb8: 041a lsls r2, r3, #16 - 8000eba: 687b ldr r3, [r7, #4] - 8000ebc: 619a str r2, [r3, #24] + 8000f6e: 887b ldrh r3, [r7, #2] + 8000f70: 041a lsls r2, r3, #16 + 8000f72: 687b ldr r3, [r7, #4] + 8000f74: 619a str r2, [r3, #24] } - 8000ebe: bf00 nop - 8000ec0: 370c adds r7, #12 - 8000ec2: 46bd mov sp, r7 - 8000ec4: f85d 7b04 ldr.w r7, [sp], #4 - 8000ec8: 4770 bx lr + 8000f76: bf00 nop + 8000f78: 370c adds r7, #12 + 8000f7a: 46bd mov sp, r7 + 8000f7c: f85d 7b04 ldr.w r7, [sp], #4 + 8000f80: 4770 bx lr ... -08000ecc : +08000f84 : * supported by this API. User should request a transition to HSE Off * first and then HSE On or HSE Bypass. * @retval HAL status */ __weak HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct) { - 8000ecc: b580 push {r7, lr} - 8000ece: b086 sub sp, #24 - 8000ed0: af00 add r7, sp, #0 - 8000ed2: 6078 str r0, [r7, #4] + 8000f84: b580 push {r7, lr} + 8000f86: b086 sub sp, #24 + 8000f88: af00 add r7, sp, #0 + 8000f8a: 6078 str r0, [r7, #4] uint32_t tickstart, pll_config; /* Check Null pointer */ if(RCC_OscInitStruct == NULL) - 8000ed4: 687b ldr r3, [r7, #4] - 8000ed6: 2b00 cmp r3, #0 - 8000ed8: d101 bne.n 8000ede + 8000f8c: 687b ldr r3, [r7, #4] + 8000f8e: 2b00 cmp r3, #0 + 8000f90: d101 bne.n 8000f96 { return HAL_ERROR; - 8000eda: 2301 movs r3, #1 - 8000edc: e267 b.n 80013ae + 8000f92: 2301 movs r3, #1 + 8000f94: e267 b.n 8001466 } /* Check the parameters */ assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType)); /*------------------------------- HSE Configuration ------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) - 8000ede: 687b ldr r3, [r7, #4] - 8000ee0: 681b ldr r3, [r3, #0] - 8000ee2: f003 0301 and.w r3, r3, #1 - 8000ee6: 2b00 cmp r3, #0 - 8000ee8: d075 beq.n 8000fd6 + 8000f96: 687b ldr r3, [r7, #4] + 8000f98: 681b ldr r3, [r3, #0] + 8000f9a: f003 0301 and.w r3, r3, #1 + 8000f9e: 2b00 cmp r3, #0 + 8000fa0: d075 beq.n 800108e { /* Check the parameters */ assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState)); /* When the HSE is used as system clock or clock source for PLL in these cases HSE will not disabled */ if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSE) ||\ - 8000eea: 4b88 ldr r3, [pc, #544] ; (800110c ) - 8000eec: 689b ldr r3, [r3, #8] - 8000eee: f003 030c and.w r3, r3, #12 - 8000ef2: 2b04 cmp r3, #4 - 8000ef4: d00c beq.n 8000f10 + 8000fa2: 4b88 ldr r3, [pc, #544] ; (80011c4 ) + 8000fa4: 689b ldr r3, [r3, #8] + 8000fa6: f003 030c and.w r3, r3, #12 + 8000faa: 2b04 cmp r3, #4 + 8000fac: d00c beq.n 8000fc8 ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSE))) - 8000ef6: 4b85 ldr r3, [pc, #532] ; (800110c ) - 8000ef8: 689b ldr r3, [r3, #8] - 8000efa: f003 030c and.w r3, r3, #12 + 8000fae: 4b85 ldr r3, [pc, #532] ; (80011c4 ) + 8000fb0: 689b ldr r3, [r3, #8] + 8000fb2: f003 030c and.w r3, r3, #12 if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSE) ||\ - 8000efe: 2b08 cmp r3, #8 - 8000f00: d112 bne.n 8000f28 + 8000fb6: 2b08 cmp r3, #8 + 8000fb8: d112 bne.n 8000fe0 ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSE))) - 8000f02: 4b82 ldr r3, [pc, #520] ; (800110c ) - 8000f04: 685b ldr r3, [r3, #4] - 8000f06: f403 0380 and.w r3, r3, #4194304 ; 0x400000 - 8000f0a: f5b3 0f80 cmp.w r3, #4194304 ; 0x400000 - 8000f0e: d10b bne.n 8000f28 + 8000fba: 4b82 ldr r3, [pc, #520] ; (80011c4 ) + 8000fbc: 685b ldr r3, [r3, #4] + 8000fbe: f403 0380 and.w r3, r3, #4194304 ; 0x400000 + 8000fc2: f5b3 0f80 cmp.w r3, #4194304 ; 0x400000 + 8000fc6: d10b bne.n 8000fe0 { if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) - 8000f10: 4b7e ldr r3, [pc, #504] ; (800110c ) - 8000f12: 681b ldr r3, [r3, #0] - 8000f14: f403 3300 and.w r3, r3, #131072 ; 0x20000 - 8000f18: 2b00 cmp r3, #0 - 8000f1a: d05b beq.n 8000fd4 - 8000f1c: 687b ldr r3, [r7, #4] - 8000f1e: 685b ldr r3, [r3, #4] - 8000f20: 2b00 cmp r3, #0 - 8000f22: d157 bne.n 8000fd4 + 8000fc8: 4b7e ldr r3, [pc, #504] ; (80011c4 ) + 8000fca: 681b ldr r3, [r3, #0] + 8000fcc: f403 3300 and.w r3, r3, #131072 ; 0x20000 + 8000fd0: 2b00 cmp r3, #0 + 8000fd2: d05b beq.n 800108c + 8000fd4: 687b ldr r3, [r7, #4] + 8000fd6: 685b ldr r3, [r3, #4] + 8000fd8: 2b00 cmp r3, #0 + 8000fda: d157 bne.n 800108c { return HAL_ERROR; - 8000f24: 2301 movs r3, #1 - 8000f26: e242 b.n 80013ae + 8000fdc: 2301 movs r3, #1 + 8000fde: e242 b.n 8001466 } } else { /* Set the new HSE configuration ---------------------------------------*/ __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); - 8000f28: 687b ldr r3, [r7, #4] - 8000f2a: 685b ldr r3, [r3, #4] - 8000f2c: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 - 8000f30: d106 bne.n 8000f40 - 8000f32: 4b76 ldr r3, [pc, #472] ; (800110c ) - 8000f34: 681b ldr r3, [r3, #0] - 8000f36: 4a75 ldr r2, [pc, #468] ; (800110c ) - 8000f38: f443 3380 orr.w r3, r3, #65536 ; 0x10000 - 8000f3c: 6013 str r3, [r2, #0] - 8000f3e: e01d b.n 8000f7c - 8000f40: 687b ldr r3, [r7, #4] - 8000f42: 685b ldr r3, [r3, #4] - 8000f44: f5b3 2fa0 cmp.w r3, #327680 ; 0x50000 - 8000f48: d10c bne.n 8000f64 - 8000f4a: 4b70 ldr r3, [pc, #448] ; (800110c ) - 8000f4c: 681b ldr r3, [r3, #0] - 8000f4e: 4a6f ldr r2, [pc, #444] ; (800110c ) - 8000f50: f443 2380 orr.w r3, r3, #262144 ; 0x40000 - 8000f54: 6013 str r3, [r2, #0] - 8000f56: 4b6d ldr r3, [pc, #436] ; (800110c ) - 8000f58: 681b ldr r3, [r3, #0] - 8000f5a: 4a6c ldr r2, [pc, #432] ; (800110c ) - 8000f5c: f443 3380 orr.w r3, r3, #65536 ; 0x10000 - 8000f60: 6013 str r3, [r2, #0] - 8000f62: e00b b.n 8000f7c - 8000f64: 4b69 ldr r3, [pc, #420] ; (800110c ) - 8000f66: 681b ldr r3, [r3, #0] - 8000f68: 4a68 ldr r2, [pc, #416] ; (800110c ) - 8000f6a: f423 3380 bic.w r3, r3, #65536 ; 0x10000 - 8000f6e: 6013 str r3, [r2, #0] - 8000f70: 4b66 ldr r3, [pc, #408] ; (800110c ) - 8000f72: 681b ldr r3, [r3, #0] - 8000f74: 4a65 ldr r2, [pc, #404] ; (800110c ) - 8000f76: f423 2380 bic.w r3, r3, #262144 ; 0x40000 - 8000f7a: 6013 str r3, [r2, #0] + 8000fe0: 687b ldr r3, [r7, #4] + 8000fe2: 685b ldr r3, [r3, #4] + 8000fe4: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 + 8000fe8: d106 bne.n 8000ff8 + 8000fea: 4b76 ldr r3, [pc, #472] ; (80011c4 ) + 8000fec: 681b ldr r3, [r3, #0] + 8000fee: 4a75 ldr r2, [pc, #468] ; (80011c4 ) + 8000ff0: f443 3380 orr.w r3, r3, #65536 ; 0x10000 + 8000ff4: 6013 str r3, [r2, #0] + 8000ff6: e01d b.n 8001034 + 8000ff8: 687b ldr r3, [r7, #4] + 8000ffa: 685b ldr r3, [r3, #4] + 8000ffc: f5b3 2fa0 cmp.w r3, #327680 ; 0x50000 + 8001000: d10c bne.n 800101c + 8001002: 4b70 ldr r3, [pc, #448] ; (80011c4 ) + 8001004: 681b ldr r3, [r3, #0] + 8001006: 4a6f ldr r2, [pc, #444] ; (80011c4 ) + 8001008: f443 2380 orr.w r3, r3, #262144 ; 0x40000 + 800100c: 6013 str r3, [r2, #0] + 800100e: 4b6d ldr r3, [pc, #436] ; (80011c4 ) + 8001010: 681b ldr r3, [r3, #0] + 8001012: 4a6c ldr r2, [pc, #432] ; (80011c4 ) + 8001014: f443 3380 orr.w r3, r3, #65536 ; 0x10000 + 8001018: 6013 str r3, [r2, #0] + 800101a: e00b b.n 8001034 + 800101c: 4b69 ldr r3, [pc, #420] ; (80011c4 ) + 800101e: 681b ldr r3, [r3, #0] + 8001020: 4a68 ldr r2, [pc, #416] ; (80011c4 ) + 8001022: f423 3380 bic.w r3, r3, #65536 ; 0x10000 + 8001026: 6013 str r3, [r2, #0] + 8001028: 4b66 ldr r3, [pc, #408] ; (80011c4 ) + 800102a: 681b ldr r3, [r3, #0] + 800102c: 4a65 ldr r2, [pc, #404] ; (80011c4 ) + 800102e: f423 2380 bic.w r3, r3, #262144 ; 0x40000 + 8001032: 6013 str r3, [r2, #0] /* Check the HSE State */ if((RCC_OscInitStruct->HSEState) != RCC_HSE_OFF) - 8000f7c: 687b ldr r3, [r7, #4] - 8000f7e: 685b ldr r3, [r3, #4] - 8000f80: 2b00 cmp r3, #0 - 8000f82: d013 beq.n 8000fac + 8001034: 687b ldr r3, [r7, #4] + 8001036: 685b ldr r3, [r3, #4] + 8001038: 2b00 cmp r3, #0 + 800103a: d013 beq.n 8001064 { /* Get Start Tick */ tickstart = HAL_GetTick(); - 8000f84: f7ff fd12 bl 80009ac - 8000f88: 6138 str r0, [r7, #16] + 800103c: f7ff fcfa bl 8000a34 + 8001040: 6138 str r0, [r7, #16] /* Wait till HSE is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) - 8000f8a: e008 b.n 8000f9e + 8001042: e008 b.n 8001056 { if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE) - 8000f8c: f7ff fd0e bl 80009ac - 8000f90: 4602 mov r2, r0 - 8000f92: 693b ldr r3, [r7, #16] - 8000f94: 1ad3 subs r3, r2, r3 - 8000f96: 2b64 cmp r3, #100 ; 0x64 - 8000f98: d901 bls.n 8000f9e + 8001044: f7ff fcf6 bl 8000a34 + 8001048: 4602 mov r2, r0 + 800104a: 693b ldr r3, [r7, #16] + 800104c: 1ad3 subs r3, r2, r3 + 800104e: 2b64 cmp r3, #100 ; 0x64 + 8001050: d901 bls.n 8001056 { return HAL_TIMEOUT; - 8000f9a: 2303 movs r3, #3 - 8000f9c: e207 b.n 80013ae + 8001052: 2303 movs r3, #3 + 8001054: e207 b.n 8001466 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) - 8000f9e: 4b5b ldr r3, [pc, #364] ; (800110c ) - 8000fa0: 681b ldr r3, [r3, #0] - 8000fa2: f403 3300 and.w r3, r3, #131072 ; 0x20000 - 8000fa6: 2b00 cmp r3, #0 - 8000fa8: d0f0 beq.n 8000f8c - 8000faa: e014 b.n 8000fd6 + 8001056: 4b5b ldr r3, [pc, #364] ; (80011c4 ) + 8001058: 681b ldr r3, [r3, #0] + 800105a: f403 3300 and.w r3, r3, #131072 ; 0x20000 + 800105e: 2b00 cmp r3, #0 + 8001060: d0f0 beq.n 8001044 + 8001062: e014 b.n 800108e } } else { /* Get Start Tick */ tickstart = HAL_GetTick(); - 8000fac: f7ff fcfe bl 80009ac - 8000fb0: 6138 str r0, [r7, #16] + 8001064: f7ff fce6 bl 8000a34 + 8001068: 6138 str r0, [r7, #16] /* Wait till HSE is bypassed or disabled */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) - 8000fb2: e008 b.n 8000fc6 + 800106a: e008 b.n 800107e { if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE) - 8000fb4: f7ff fcfa bl 80009ac - 8000fb8: 4602 mov r2, r0 - 8000fba: 693b ldr r3, [r7, #16] - 8000fbc: 1ad3 subs r3, r2, r3 - 8000fbe: 2b64 cmp r3, #100 ; 0x64 - 8000fc0: d901 bls.n 8000fc6 + 800106c: f7ff fce2 bl 8000a34 + 8001070: 4602 mov r2, r0 + 8001072: 693b ldr r3, [r7, #16] + 8001074: 1ad3 subs r3, r2, r3 + 8001076: 2b64 cmp r3, #100 ; 0x64 + 8001078: d901 bls.n 800107e { return HAL_TIMEOUT; - 8000fc2: 2303 movs r3, #3 - 8000fc4: e1f3 b.n 80013ae + 800107a: 2303 movs r3, #3 + 800107c: e1f3 b.n 8001466 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) - 8000fc6: 4b51 ldr r3, [pc, #324] ; (800110c ) - 8000fc8: 681b ldr r3, [r3, #0] - 8000fca: f403 3300 and.w r3, r3, #131072 ; 0x20000 - 8000fce: 2b00 cmp r3, #0 - 8000fd0: d1f0 bne.n 8000fb4 - 8000fd2: e000 b.n 8000fd6 + 800107e: 4b51 ldr r3, [pc, #324] ; (80011c4 ) + 8001080: 681b ldr r3, [r3, #0] + 8001082: f403 3300 and.w r3, r3, #131072 ; 0x20000 + 8001086: 2b00 cmp r3, #0 + 8001088: d1f0 bne.n 800106c + 800108a: e000 b.n 800108e if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) - 8000fd4: bf00 nop + 800108c: bf00 nop } } } } /*----------------------------- HSI Configuration --------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI) - 8000fd6: 687b ldr r3, [r7, #4] - 8000fd8: 681b ldr r3, [r3, #0] - 8000fda: f003 0302 and.w r3, r3, #2 - 8000fde: 2b00 cmp r3, #0 - 8000fe0: d063 beq.n 80010aa + 800108e: 687b ldr r3, [r7, #4] + 8001090: 681b ldr r3, [r3, #0] + 8001092: f003 0302 and.w r3, r3, #2 + 8001096: 2b00 cmp r3, #0 + 8001098: d063 beq.n 8001162 /* Check the parameters */ assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState)); assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue)); /* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */ if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSI) ||\ - 8000fe2: 4b4a ldr r3, [pc, #296] ; (800110c ) - 8000fe4: 689b ldr r3, [r3, #8] - 8000fe6: f003 030c and.w r3, r3, #12 - 8000fea: 2b00 cmp r3, #0 - 8000fec: d00b beq.n 8001006 + 800109a: 4b4a ldr r3, [pc, #296] ; (80011c4 ) + 800109c: 689b ldr r3, [r3, #8] + 800109e: f003 030c and.w r3, r3, #12 + 80010a2: 2b00 cmp r3, #0 + 80010a4: d00b beq.n 80010be ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSI))) - 8000fee: 4b47 ldr r3, [pc, #284] ; (800110c ) - 8000ff0: 689b ldr r3, [r3, #8] - 8000ff2: f003 030c and.w r3, r3, #12 + 80010a6: 4b47 ldr r3, [pc, #284] ; (80011c4 ) + 80010a8: 689b ldr r3, [r3, #8] + 80010aa: f003 030c and.w r3, r3, #12 if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSI) ||\ - 8000ff6: 2b08 cmp r3, #8 - 8000ff8: d11c bne.n 8001034 + 80010ae: 2b08 cmp r3, #8 + 80010b0: d11c bne.n 80010ec ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSI))) - 8000ffa: 4b44 ldr r3, [pc, #272] ; (800110c ) - 8000ffc: 685b ldr r3, [r3, #4] - 8000ffe: f403 0380 and.w r3, r3, #4194304 ; 0x400000 - 8001002: 2b00 cmp r3, #0 - 8001004: d116 bne.n 8001034 + 80010b2: 4b44 ldr r3, [pc, #272] ; (80011c4 ) + 80010b4: 685b ldr r3, [r3, #4] + 80010b6: f403 0380 and.w r3, r3, #4194304 ; 0x400000 + 80010ba: 2b00 cmp r3, #0 + 80010bc: d116 bne.n 80010ec { /* When HSI is used as system clock it will not disabled */ if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON)) - 8001006: 4b41 ldr r3, [pc, #260] ; (800110c ) - 8001008: 681b ldr r3, [r3, #0] - 800100a: f003 0302 and.w r3, r3, #2 - 800100e: 2b00 cmp r3, #0 - 8001010: d005 beq.n 800101e - 8001012: 687b ldr r3, [r7, #4] - 8001014: 68db ldr r3, [r3, #12] - 8001016: 2b01 cmp r3, #1 - 8001018: d001 beq.n 800101e + 80010be: 4b41 ldr r3, [pc, #260] ; (80011c4 ) + 80010c0: 681b ldr r3, [r3, #0] + 80010c2: f003 0302 and.w r3, r3, #2 + 80010c6: 2b00 cmp r3, #0 + 80010c8: d005 beq.n 80010d6 + 80010ca: 687b ldr r3, [r7, #4] + 80010cc: 68db ldr r3, [r3, #12] + 80010ce: 2b01 cmp r3, #1 + 80010d0: d001 beq.n 80010d6 { return HAL_ERROR; - 800101a: 2301 movs r3, #1 - 800101c: e1c7 b.n 80013ae + 80010d2: 2301 movs r3, #1 + 80010d4: e1c7 b.n 8001466 } /* Otherwise, just the calibration is allowed */ else { /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); - 800101e: 4b3b ldr r3, [pc, #236] ; (800110c ) - 8001020: 681b ldr r3, [r3, #0] - 8001022: f023 02f8 bic.w r2, r3, #248 ; 0xf8 - 8001026: 687b ldr r3, [r7, #4] - 8001028: 691b ldr r3, [r3, #16] - 800102a: 00db lsls r3, r3, #3 - 800102c: 4937 ldr r1, [pc, #220] ; (800110c ) - 800102e: 4313 orrs r3, r2 - 8001030: 600b str r3, [r1, #0] + 80010d6: 4b3b ldr r3, [pc, #236] ; (80011c4 ) + 80010d8: 681b ldr r3, [r3, #0] + 80010da: f023 02f8 bic.w r2, r3, #248 ; 0xf8 + 80010de: 687b ldr r3, [r7, #4] + 80010e0: 691b ldr r3, [r3, #16] + 80010e2: 00db lsls r3, r3, #3 + 80010e4: 4937 ldr r1, [pc, #220] ; (80011c4 ) + 80010e6: 4313 orrs r3, r2 + 80010e8: 600b str r3, [r1, #0] if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON)) - 8001032: e03a b.n 80010aa + 80010ea: e03a b.n 8001162 } } else { /* Check the HSI State */ if((RCC_OscInitStruct->HSIState)!= RCC_HSI_OFF) - 8001034: 687b ldr r3, [r7, #4] - 8001036: 68db ldr r3, [r3, #12] - 8001038: 2b00 cmp r3, #0 - 800103a: d020 beq.n 800107e + 80010ec: 687b ldr r3, [r7, #4] + 80010ee: 68db ldr r3, [r3, #12] + 80010f0: 2b00 cmp r3, #0 + 80010f2: d020 beq.n 8001136 { /* Enable the Internal High Speed oscillator (HSI). */ __HAL_RCC_HSI_ENABLE(); - 800103c: 4b34 ldr r3, [pc, #208] ; (8001110 ) - 800103e: 2201 movs r2, #1 - 8001040: 601a str r2, [r3, #0] + 80010f4: 4b34 ldr r3, [pc, #208] ; (80011c8 ) + 80010f6: 2201 movs r2, #1 + 80010f8: 601a str r2, [r3, #0] /* Get Start Tick*/ tickstart = HAL_GetTick(); - 8001042: f7ff fcb3 bl 80009ac - 8001046: 6138 str r0, [r7, #16] + 80010fa: f7ff fc9b bl 8000a34 + 80010fe: 6138 str r0, [r7, #16] /* Wait till HSI is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) - 8001048: e008 b.n 800105c + 8001100: e008 b.n 8001114 { if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE) - 800104a: f7ff fcaf bl 80009ac - 800104e: 4602 mov r2, r0 - 8001050: 693b ldr r3, [r7, #16] - 8001052: 1ad3 subs r3, r2, r3 - 8001054: 2b02 cmp r3, #2 - 8001056: d901 bls.n 800105c + 8001102: f7ff fc97 bl 8000a34 + 8001106: 4602 mov r2, r0 + 8001108: 693b ldr r3, [r7, #16] + 800110a: 1ad3 subs r3, r2, r3 + 800110c: 2b02 cmp r3, #2 + 800110e: d901 bls.n 8001114 { return HAL_TIMEOUT; - 8001058: 2303 movs r3, #3 - 800105a: e1a8 b.n 80013ae + 8001110: 2303 movs r3, #3 + 8001112: e1a8 b.n 8001466 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) - 800105c: 4b2b ldr r3, [pc, #172] ; (800110c ) - 800105e: 681b ldr r3, [r3, #0] - 8001060: f003 0302 and.w r3, r3, #2 - 8001064: 2b00 cmp r3, #0 - 8001066: d0f0 beq.n 800104a + 8001114: 4b2b ldr r3, [pc, #172] ; (80011c4 ) + 8001116: 681b ldr r3, [r3, #0] + 8001118: f003 0302 and.w r3, r3, #2 + 800111c: 2b00 cmp r3, #0 + 800111e: d0f0 beq.n 8001102 } } /* Adjusts the Internal High Speed oscillator (HSI) calibration value. */ __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); - 8001068: 4b28 ldr r3, [pc, #160] ; (800110c ) - 800106a: 681b ldr r3, [r3, #0] - 800106c: f023 02f8 bic.w r2, r3, #248 ; 0xf8 - 8001070: 687b ldr r3, [r7, #4] - 8001072: 691b ldr r3, [r3, #16] - 8001074: 00db lsls r3, r3, #3 - 8001076: 4925 ldr r1, [pc, #148] ; (800110c ) - 8001078: 4313 orrs r3, r2 - 800107a: 600b str r3, [r1, #0] - 800107c: e015 b.n 80010aa + 8001120: 4b28 ldr r3, [pc, #160] ; (80011c4 ) + 8001122: 681b ldr r3, [r3, #0] + 8001124: f023 02f8 bic.w r2, r3, #248 ; 0xf8 + 8001128: 687b ldr r3, [r7, #4] + 800112a: 691b ldr r3, [r3, #16] + 800112c: 00db lsls r3, r3, #3 + 800112e: 4925 ldr r1, [pc, #148] ; (80011c4 ) + 8001130: 4313 orrs r3, r2 + 8001132: 600b str r3, [r1, #0] + 8001134: e015 b.n 8001162 } else { /* Disable the Internal High Speed oscillator (HSI). */ __HAL_RCC_HSI_DISABLE(); - 800107e: 4b24 ldr r3, [pc, #144] ; (8001110 ) - 8001080: 2200 movs r2, #0 - 8001082: 601a str r2, [r3, #0] + 8001136: 4b24 ldr r3, [pc, #144] ; (80011c8 ) + 8001138: 2200 movs r2, #0 + 800113a: 601a str r2, [r3, #0] /* Get Start Tick*/ tickstart = HAL_GetTick(); - 8001084: f7ff fc92 bl 80009ac - 8001088: 6138 str r0, [r7, #16] + 800113c: f7ff fc7a bl 8000a34 + 8001140: 6138 str r0, [r7, #16] /* Wait till HSI is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) - 800108a: e008 b.n 800109e + 8001142: e008 b.n 8001156 { if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE) - 800108c: f7ff fc8e bl 80009ac - 8001090: 4602 mov r2, r0 - 8001092: 693b ldr r3, [r7, #16] - 8001094: 1ad3 subs r3, r2, r3 - 8001096: 2b02 cmp r3, #2 - 8001098: d901 bls.n 800109e + 8001144: f7ff fc76 bl 8000a34 + 8001148: 4602 mov r2, r0 + 800114a: 693b ldr r3, [r7, #16] + 800114c: 1ad3 subs r3, r2, r3 + 800114e: 2b02 cmp r3, #2 + 8001150: d901 bls.n 8001156 { return HAL_TIMEOUT; - 800109a: 2303 movs r3, #3 - 800109c: e187 b.n 80013ae + 8001152: 2303 movs r3, #3 + 8001154: e187 b.n 8001466 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) - 800109e: 4b1b ldr r3, [pc, #108] ; (800110c ) - 80010a0: 681b ldr r3, [r3, #0] - 80010a2: f003 0302 and.w r3, r3, #2 - 80010a6: 2b00 cmp r3, #0 - 80010a8: d1f0 bne.n 800108c + 8001156: 4b1b ldr r3, [pc, #108] ; (80011c4 ) + 8001158: 681b ldr r3, [r3, #0] + 800115a: f003 0302 and.w r3, r3, #2 + 800115e: 2b00 cmp r3, #0 + 8001160: d1f0 bne.n 8001144 } } } } /*------------------------------ LSI Configuration -------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI) - 80010aa: 687b ldr r3, [r7, #4] - 80010ac: 681b ldr r3, [r3, #0] - 80010ae: f003 0308 and.w r3, r3, #8 - 80010b2: 2b00 cmp r3, #0 - 80010b4: d036 beq.n 8001124 + 8001162: 687b ldr r3, [r7, #4] + 8001164: 681b ldr r3, [r3, #0] + 8001166: f003 0308 and.w r3, r3, #8 + 800116a: 2b00 cmp r3, #0 + 800116c: d036 beq.n 80011dc { /* Check the parameters */ assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState)); /* Check the LSI State */ if((RCC_OscInitStruct->LSIState)!= RCC_LSI_OFF) - 80010b6: 687b ldr r3, [r7, #4] - 80010b8: 695b ldr r3, [r3, #20] - 80010ba: 2b00 cmp r3, #0 - 80010bc: d016 beq.n 80010ec + 800116e: 687b ldr r3, [r7, #4] + 8001170: 695b ldr r3, [r3, #20] + 8001172: 2b00 cmp r3, #0 + 8001174: d016 beq.n 80011a4 { /* Enable the Internal Low Speed oscillator (LSI). */ __HAL_RCC_LSI_ENABLE(); - 80010be: 4b15 ldr r3, [pc, #84] ; (8001114 ) - 80010c0: 2201 movs r2, #1 - 80010c2: 601a str r2, [r3, #0] + 8001176: 4b15 ldr r3, [pc, #84] ; (80011cc ) + 8001178: 2201 movs r2, #1 + 800117a: 601a str r2, [r3, #0] /* Get Start Tick*/ tickstart = HAL_GetTick(); - 80010c4: f7ff fc72 bl 80009ac - 80010c8: 6138 str r0, [r7, #16] + 800117c: f7ff fc5a bl 8000a34 + 8001180: 6138 str r0, [r7, #16] /* Wait till LSI is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) - 80010ca: e008 b.n 80010de + 8001182: e008 b.n 8001196 { if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE) - 80010cc: f7ff fc6e bl 80009ac - 80010d0: 4602 mov r2, r0 - 80010d2: 693b ldr r3, [r7, #16] - 80010d4: 1ad3 subs r3, r2, r3 - 80010d6: 2b02 cmp r3, #2 - 80010d8: d901 bls.n 80010de + 8001184: f7ff fc56 bl 8000a34 + 8001188: 4602 mov r2, r0 + 800118a: 693b ldr r3, [r7, #16] + 800118c: 1ad3 subs r3, r2, r3 + 800118e: 2b02 cmp r3, #2 + 8001190: d901 bls.n 8001196 { return HAL_TIMEOUT; - 80010da: 2303 movs r3, #3 - 80010dc: e167 b.n 80013ae + 8001192: 2303 movs r3, #3 + 8001194: e167 b.n 8001466 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) - 80010de: 4b0b ldr r3, [pc, #44] ; (800110c ) - 80010e0: 6f5b ldr r3, [r3, #116] ; 0x74 - 80010e2: f003 0302 and.w r3, r3, #2 - 80010e6: 2b00 cmp r3, #0 - 80010e8: d0f0 beq.n 80010cc - 80010ea: e01b b.n 8001124 + 8001196: 4b0b ldr r3, [pc, #44] ; (80011c4 ) + 8001198: 6f5b ldr r3, [r3, #116] ; 0x74 + 800119a: f003 0302 and.w r3, r3, #2 + 800119e: 2b00 cmp r3, #0 + 80011a0: d0f0 beq.n 8001184 + 80011a2: e01b b.n 80011dc } } else { /* Disable the Internal Low Speed oscillator (LSI). */ __HAL_RCC_LSI_DISABLE(); - 80010ec: 4b09 ldr r3, [pc, #36] ; (8001114 ) - 80010ee: 2200 movs r2, #0 - 80010f0: 601a str r2, [r3, #0] + 80011a4: 4b09 ldr r3, [pc, #36] ; (80011cc ) + 80011a6: 2200 movs r2, #0 + 80011a8: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 80010f2: f7ff fc5b bl 80009ac - 80010f6: 6138 str r0, [r7, #16] + 80011aa: f7ff fc43 bl 8000a34 + 80011ae: 6138 str r0, [r7, #16] /* Wait till LSI is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) - 80010f8: e00e b.n 8001118 + 80011b0: e00e b.n 80011d0 { if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE) - 80010fa: f7ff fc57 bl 80009ac - 80010fe: 4602 mov r2, r0 - 8001100: 693b ldr r3, [r7, #16] - 8001102: 1ad3 subs r3, r2, r3 - 8001104: 2b02 cmp r3, #2 - 8001106: d907 bls.n 8001118 + 80011b2: f7ff fc3f bl 8000a34 + 80011b6: 4602 mov r2, r0 + 80011b8: 693b ldr r3, [r7, #16] + 80011ba: 1ad3 subs r3, r2, r3 + 80011bc: 2b02 cmp r3, #2 + 80011be: d907 bls.n 80011d0 { return HAL_TIMEOUT; - 8001108: 2303 movs r3, #3 - 800110a: e150 b.n 80013ae - 800110c: 40023800 .word 0x40023800 - 8001110: 42470000 .word 0x42470000 - 8001114: 42470e80 .word 0x42470e80 + 80011c0: 2303 movs r3, #3 + 80011c2: e150 b.n 8001466 + 80011c4: 40023800 .word 0x40023800 + 80011c8: 42470000 .word 0x42470000 + 80011cc: 42470e80 .word 0x42470e80 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) - 8001118: 4b88 ldr r3, [pc, #544] ; (800133c ) - 800111a: 6f5b ldr r3, [r3, #116] ; 0x74 - 800111c: f003 0302 and.w r3, r3, #2 - 8001120: 2b00 cmp r3, #0 - 8001122: d1ea bne.n 80010fa + 80011d0: 4b88 ldr r3, [pc, #544] ; (80013f4 ) + 80011d2: 6f5b ldr r3, [r3, #116] ; 0x74 + 80011d4: f003 0302 and.w r3, r3, #2 + 80011d8: 2b00 cmp r3, #0 + 80011da: d1ea bne.n 80011b2 } } } } /*------------------------------ LSE Configuration -------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE) - 8001124: 687b ldr r3, [r7, #4] - 8001126: 681b ldr r3, [r3, #0] - 8001128: f003 0304 and.w r3, r3, #4 - 800112c: 2b00 cmp r3, #0 - 800112e: f000 8097 beq.w 8001260 + 80011dc: 687b ldr r3, [r7, #4] + 80011de: 681b ldr r3, [r3, #0] + 80011e0: f003 0304 and.w r3, r3, #4 + 80011e4: 2b00 cmp r3, #0 + 80011e6: f000 8097 beq.w 8001318 { FlagStatus pwrclkchanged = RESET; - 8001132: 2300 movs r3, #0 - 8001134: 75fb strb r3, [r7, #23] + 80011ea: 2300 movs r3, #0 + 80011ec: 75fb strb r3, [r7, #23] /* Check the parameters */ assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState)); /* Update LSE configuration in Backup Domain control register */ /* Requires to enable write access to Backup Domain of necessary */ if(__HAL_RCC_PWR_IS_CLK_DISABLED()) - 8001136: 4b81 ldr r3, [pc, #516] ; (800133c ) - 8001138: 6c1b ldr r3, [r3, #64] ; 0x40 - 800113a: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 - 800113e: 2b00 cmp r3, #0 - 8001140: d10f bne.n 8001162 + 80011ee: 4b81 ldr r3, [pc, #516] ; (80013f4 ) + 80011f0: 6c1b ldr r3, [r3, #64] ; 0x40 + 80011f2: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 + 80011f6: 2b00 cmp r3, #0 + 80011f8: d10f bne.n 800121a { __HAL_RCC_PWR_CLK_ENABLE(); - 8001142: 2300 movs r3, #0 - 8001144: 60bb str r3, [r7, #8] - 8001146: 4b7d ldr r3, [pc, #500] ; (800133c ) - 8001148: 6c1b ldr r3, [r3, #64] ; 0x40 - 800114a: 4a7c ldr r2, [pc, #496] ; (800133c ) - 800114c: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000 - 8001150: 6413 str r3, [r2, #64] ; 0x40 - 8001152: 4b7a ldr r3, [pc, #488] ; (800133c ) - 8001154: 6c1b ldr r3, [r3, #64] ; 0x40 - 8001156: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 - 800115a: 60bb str r3, [r7, #8] - 800115c: 68bb ldr r3, [r7, #8] + 80011fa: 2300 movs r3, #0 + 80011fc: 60bb str r3, [r7, #8] + 80011fe: 4b7d ldr r3, [pc, #500] ; (80013f4 ) + 8001200: 6c1b ldr r3, [r3, #64] ; 0x40 + 8001202: 4a7c ldr r2, [pc, #496] ; (80013f4 ) + 8001204: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000 + 8001208: 6413 str r3, [r2, #64] ; 0x40 + 800120a: 4b7a ldr r3, [pc, #488] ; (80013f4 ) + 800120c: 6c1b ldr r3, [r3, #64] ; 0x40 + 800120e: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 + 8001212: 60bb str r3, [r7, #8] + 8001214: 68bb ldr r3, [r7, #8] pwrclkchanged = SET; - 800115e: 2301 movs r3, #1 - 8001160: 75fb strb r3, [r7, #23] + 8001216: 2301 movs r3, #1 + 8001218: 75fb strb r3, [r7, #23] } if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) - 8001162: 4b77 ldr r3, [pc, #476] ; (8001340 ) - 8001164: 681b ldr r3, [r3, #0] - 8001166: f403 7380 and.w r3, r3, #256 ; 0x100 - 800116a: 2b00 cmp r3, #0 - 800116c: d118 bne.n 80011a0 + 800121a: 4b77 ldr r3, [pc, #476] ; (80013f8 ) + 800121c: 681b ldr r3, [r3, #0] + 800121e: f403 7380 and.w r3, r3, #256 ; 0x100 + 8001222: 2b00 cmp r3, #0 + 8001224: d118 bne.n 8001258 { /* Enable write access to Backup domain */ SET_BIT(PWR->CR, PWR_CR_DBP); - 800116e: 4b74 ldr r3, [pc, #464] ; (8001340 ) - 8001170: 681b ldr r3, [r3, #0] - 8001172: 4a73 ldr r2, [pc, #460] ; (8001340 ) - 8001174: f443 7380 orr.w r3, r3, #256 ; 0x100 - 8001178: 6013 str r3, [r2, #0] + 8001226: 4b74 ldr r3, [pc, #464] ; (80013f8 ) + 8001228: 681b ldr r3, [r3, #0] + 800122a: 4a73 ldr r2, [pc, #460] ; (80013f8 ) + 800122c: f443 7380 orr.w r3, r3, #256 ; 0x100 + 8001230: 6013 str r3, [r2, #0] /* Wait for Backup domain Write protection disable */ tickstart = HAL_GetTick(); - 800117a: f7ff fc17 bl 80009ac - 800117e: 6138 str r0, [r7, #16] + 8001232: f7ff fbff bl 8000a34 + 8001236: 6138 str r0, [r7, #16] while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) - 8001180: e008 b.n 8001194 + 8001238: e008 b.n 800124c { if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) - 8001182: f7ff fc13 bl 80009ac - 8001186: 4602 mov r2, r0 - 8001188: 693b ldr r3, [r7, #16] - 800118a: 1ad3 subs r3, r2, r3 - 800118c: 2b02 cmp r3, #2 - 800118e: d901 bls.n 8001194 + 800123a: f7ff fbfb bl 8000a34 + 800123e: 4602 mov r2, r0 + 8001240: 693b ldr r3, [r7, #16] + 8001242: 1ad3 subs r3, r2, r3 + 8001244: 2b02 cmp r3, #2 + 8001246: d901 bls.n 800124c { return HAL_TIMEOUT; - 8001190: 2303 movs r3, #3 - 8001192: e10c b.n 80013ae + 8001248: 2303 movs r3, #3 + 800124a: e10c b.n 8001466 while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) - 8001194: 4b6a ldr r3, [pc, #424] ; (8001340 ) - 8001196: 681b ldr r3, [r3, #0] - 8001198: f403 7380 and.w r3, r3, #256 ; 0x100 - 800119c: 2b00 cmp r3, #0 - 800119e: d0f0 beq.n 8001182 + 800124c: 4b6a ldr r3, [pc, #424] ; (80013f8 ) + 800124e: 681b ldr r3, [r3, #0] + 8001250: f403 7380 and.w r3, r3, #256 ; 0x100 + 8001254: 2b00 cmp r3, #0 + 8001256: d0f0 beq.n 800123a } } } /* Set the new LSE configuration -----------------------------------------*/ __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); - 80011a0: 687b ldr r3, [r7, #4] - 80011a2: 689b ldr r3, [r3, #8] - 80011a4: 2b01 cmp r3, #1 - 80011a6: d106 bne.n 80011b6 - 80011a8: 4b64 ldr r3, [pc, #400] ; (800133c ) - 80011aa: 6f1b ldr r3, [r3, #112] ; 0x70 - 80011ac: 4a63 ldr r2, [pc, #396] ; (800133c ) - 80011ae: f043 0301 orr.w r3, r3, #1 - 80011b2: 6713 str r3, [r2, #112] ; 0x70 - 80011b4: e01c b.n 80011f0 - 80011b6: 687b ldr r3, [r7, #4] - 80011b8: 689b ldr r3, [r3, #8] - 80011ba: 2b05 cmp r3, #5 - 80011bc: d10c bne.n 80011d8 - 80011be: 4b5f ldr r3, [pc, #380] ; (800133c ) - 80011c0: 6f1b ldr r3, [r3, #112] ; 0x70 - 80011c2: 4a5e ldr r2, [pc, #376] ; (800133c ) - 80011c4: f043 0304 orr.w r3, r3, #4 - 80011c8: 6713 str r3, [r2, #112] ; 0x70 - 80011ca: 4b5c ldr r3, [pc, #368] ; (800133c ) - 80011cc: 6f1b ldr r3, [r3, #112] ; 0x70 - 80011ce: 4a5b ldr r2, [pc, #364] ; (800133c ) - 80011d0: f043 0301 orr.w r3, r3, #1 - 80011d4: 6713 str r3, [r2, #112] ; 0x70 - 80011d6: e00b b.n 80011f0 - 80011d8: 4b58 ldr r3, [pc, #352] ; (800133c ) - 80011da: 6f1b ldr r3, [r3, #112] ; 0x70 - 80011dc: 4a57 ldr r2, [pc, #348] ; (800133c ) - 80011de: f023 0301 bic.w r3, r3, #1 - 80011e2: 6713 str r3, [r2, #112] ; 0x70 - 80011e4: 4b55 ldr r3, [pc, #340] ; (800133c ) - 80011e6: 6f1b ldr r3, [r3, #112] ; 0x70 - 80011e8: 4a54 ldr r2, [pc, #336] ; (800133c ) - 80011ea: f023 0304 bic.w r3, r3, #4 - 80011ee: 6713 str r3, [r2, #112] ; 0x70 + 8001258: 687b ldr r3, [r7, #4] + 800125a: 689b ldr r3, [r3, #8] + 800125c: 2b01 cmp r3, #1 + 800125e: d106 bne.n 800126e + 8001260: 4b64 ldr r3, [pc, #400] ; (80013f4 ) + 8001262: 6f1b ldr r3, [r3, #112] ; 0x70 + 8001264: 4a63 ldr r2, [pc, #396] ; (80013f4 ) + 8001266: f043 0301 orr.w r3, r3, #1 + 800126a: 6713 str r3, [r2, #112] ; 0x70 + 800126c: e01c b.n 80012a8 + 800126e: 687b ldr r3, [r7, #4] + 8001270: 689b ldr r3, [r3, #8] + 8001272: 2b05 cmp r3, #5 + 8001274: d10c bne.n 8001290 + 8001276: 4b5f ldr r3, [pc, #380] ; (80013f4 ) + 8001278: 6f1b ldr r3, [r3, #112] ; 0x70 + 800127a: 4a5e ldr r2, [pc, #376] ; (80013f4 ) + 800127c: f043 0304 orr.w r3, r3, #4 + 8001280: 6713 str r3, [r2, #112] ; 0x70 + 8001282: 4b5c ldr r3, [pc, #368] ; (80013f4 ) + 8001284: 6f1b ldr r3, [r3, #112] ; 0x70 + 8001286: 4a5b ldr r2, [pc, #364] ; (80013f4 ) + 8001288: f043 0301 orr.w r3, r3, #1 + 800128c: 6713 str r3, [r2, #112] ; 0x70 + 800128e: e00b b.n 80012a8 + 8001290: 4b58 ldr r3, [pc, #352] ; (80013f4 ) + 8001292: 6f1b ldr r3, [r3, #112] ; 0x70 + 8001294: 4a57 ldr r2, [pc, #348] ; (80013f4 ) + 8001296: f023 0301 bic.w r3, r3, #1 + 800129a: 6713 str r3, [r2, #112] ; 0x70 + 800129c: 4b55 ldr r3, [pc, #340] ; (80013f4 ) + 800129e: 6f1b ldr r3, [r3, #112] ; 0x70 + 80012a0: 4a54 ldr r2, [pc, #336] ; (80013f4 ) + 80012a2: f023 0304 bic.w r3, r3, #4 + 80012a6: 6713 str r3, [r2, #112] ; 0x70 /* Check the LSE State */ if((RCC_OscInitStruct->LSEState) != RCC_LSE_OFF) - 80011f0: 687b ldr r3, [r7, #4] - 80011f2: 689b ldr r3, [r3, #8] - 80011f4: 2b00 cmp r3, #0 - 80011f6: d015 beq.n 8001224 + 80012a8: 687b ldr r3, [r7, #4] + 80012aa: 689b ldr r3, [r3, #8] + 80012ac: 2b00 cmp r3, #0 + 80012ae: d015 beq.n 80012dc { /* Get Start Tick*/ tickstart = HAL_GetTick(); - 80011f8: f7ff fbd8 bl 80009ac - 80011fc: 6138 str r0, [r7, #16] + 80012b0: f7ff fbc0 bl 8000a34 + 80012b4: 6138 str r0, [r7, #16] /* Wait till LSE is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) - 80011fe: e00a b.n 8001216 + 80012b6: e00a b.n 80012ce { if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) - 8001200: f7ff fbd4 bl 80009ac - 8001204: 4602 mov r2, r0 - 8001206: 693b ldr r3, [r7, #16] - 8001208: 1ad3 subs r3, r2, r3 - 800120a: f241 3288 movw r2, #5000 ; 0x1388 - 800120e: 4293 cmp r3, r2 - 8001210: d901 bls.n 8001216 + 80012b8: f7ff fbbc bl 8000a34 + 80012bc: 4602 mov r2, r0 + 80012be: 693b ldr r3, [r7, #16] + 80012c0: 1ad3 subs r3, r2, r3 + 80012c2: f241 3288 movw r2, #5000 ; 0x1388 + 80012c6: 4293 cmp r3, r2 + 80012c8: d901 bls.n 80012ce { return HAL_TIMEOUT; - 8001212: 2303 movs r3, #3 - 8001214: e0cb b.n 80013ae + 80012ca: 2303 movs r3, #3 + 80012cc: e0cb b.n 8001466 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) - 8001216: 4b49 ldr r3, [pc, #292] ; (800133c ) - 8001218: 6f1b ldr r3, [r3, #112] ; 0x70 - 800121a: f003 0302 and.w r3, r3, #2 - 800121e: 2b00 cmp r3, #0 - 8001220: d0ee beq.n 8001200 - 8001222: e014 b.n 800124e + 80012ce: 4b49 ldr r3, [pc, #292] ; (80013f4 ) + 80012d0: 6f1b ldr r3, [r3, #112] ; 0x70 + 80012d2: f003 0302 and.w r3, r3, #2 + 80012d6: 2b00 cmp r3, #0 + 80012d8: d0ee beq.n 80012b8 + 80012da: e014 b.n 8001306 } } else { /* Get Start Tick */ tickstart = HAL_GetTick(); - 8001224: f7ff fbc2 bl 80009ac - 8001228: 6138 str r0, [r7, #16] + 80012dc: f7ff fbaa bl 8000a34 + 80012e0: 6138 str r0, [r7, #16] /* Wait till LSE is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) - 800122a: e00a b.n 8001242 + 80012e2: e00a b.n 80012fa { if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) - 800122c: f7ff fbbe bl 80009ac - 8001230: 4602 mov r2, r0 - 8001232: 693b ldr r3, [r7, #16] - 8001234: 1ad3 subs r3, r2, r3 - 8001236: f241 3288 movw r2, #5000 ; 0x1388 - 800123a: 4293 cmp r3, r2 - 800123c: d901 bls.n 8001242 + 80012e4: f7ff fba6 bl 8000a34 + 80012e8: 4602 mov r2, r0 + 80012ea: 693b ldr r3, [r7, #16] + 80012ec: 1ad3 subs r3, r2, r3 + 80012ee: f241 3288 movw r2, #5000 ; 0x1388 + 80012f2: 4293 cmp r3, r2 + 80012f4: d901 bls.n 80012fa { return HAL_TIMEOUT; - 800123e: 2303 movs r3, #3 - 8001240: e0b5 b.n 80013ae + 80012f6: 2303 movs r3, #3 + 80012f8: e0b5 b.n 8001466 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) - 8001242: 4b3e ldr r3, [pc, #248] ; (800133c ) - 8001244: 6f1b ldr r3, [r3, #112] ; 0x70 - 8001246: f003 0302 and.w r3, r3, #2 - 800124a: 2b00 cmp r3, #0 - 800124c: d1ee bne.n 800122c + 80012fa: 4b3e ldr r3, [pc, #248] ; (80013f4 ) + 80012fc: 6f1b ldr r3, [r3, #112] ; 0x70 + 80012fe: f003 0302 and.w r3, r3, #2 + 8001302: 2b00 cmp r3, #0 + 8001304: d1ee bne.n 80012e4 } } } /* Restore clock configuration if changed */ if(pwrclkchanged == SET) - 800124e: 7dfb ldrb r3, [r7, #23] - 8001250: 2b01 cmp r3, #1 - 8001252: d105 bne.n 8001260 + 8001306: 7dfb ldrb r3, [r7, #23] + 8001308: 2b01 cmp r3, #1 + 800130a: d105 bne.n 8001318 { __HAL_RCC_PWR_CLK_DISABLE(); - 8001254: 4b39 ldr r3, [pc, #228] ; (800133c ) - 8001256: 6c1b ldr r3, [r3, #64] ; 0x40 - 8001258: 4a38 ldr r2, [pc, #224] ; (800133c ) - 800125a: f023 5380 bic.w r3, r3, #268435456 ; 0x10000000 - 800125e: 6413 str r3, [r2, #64] ; 0x40 + 800130c: 4b39 ldr r3, [pc, #228] ; (80013f4 ) + 800130e: 6c1b ldr r3, [r3, #64] ; 0x40 + 8001310: 4a38 ldr r2, [pc, #224] ; (80013f4 ) + 8001312: f023 5380 bic.w r3, r3, #268435456 ; 0x10000000 + 8001316: 6413 str r3, [r2, #64] ; 0x40 } } /*-------------------------------- PLL Configuration -----------------------*/ /* Check the parameters */ assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState)); if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE) - 8001260: 687b ldr r3, [r7, #4] - 8001262: 699b ldr r3, [r3, #24] - 8001264: 2b00 cmp r3, #0 - 8001266: f000 80a1 beq.w 80013ac + 8001318: 687b ldr r3, [r7, #4] + 800131a: 699b ldr r3, [r3, #24] + 800131c: 2b00 cmp r3, #0 + 800131e: f000 80a1 beq.w 8001464 { /* Check if the PLL is used as system clock or not */ if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_PLL) - 800126a: 4b34 ldr r3, [pc, #208] ; (800133c ) - 800126c: 689b ldr r3, [r3, #8] - 800126e: f003 030c and.w r3, r3, #12 - 8001272: 2b08 cmp r3, #8 - 8001274: d05c beq.n 8001330 + 8001322: 4b34 ldr r3, [pc, #208] ; (80013f4 ) + 8001324: 689b ldr r3, [r3, #8] + 8001326: f003 030c and.w r3, r3, #12 + 800132a: 2b08 cmp r3, #8 + 800132c: d05c beq.n 80013e8 { if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON) - 8001276: 687b ldr r3, [r7, #4] - 8001278: 699b ldr r3, [r3, #24] - 800127a: 2b02 cmp r3, #2 - 800127c: d141 bne.n 8001302 + 800132e: 687b ldr r3, [r7, #4] + 8001330: 699b ldr r3, [r3, #24] + 8001332: 2b02 cmp r3, #2 + 8001334: d141 bne.n 80013ba assert_param(IS_RCC_PLLN_VALUE(RCC_OscInitStruct->PLL.PLLN)); assert_param(IS_RCC_PLLP_VALUE(RCC_OscInitStruct->PLL.PLLP)); assert_param(IS_RCC_PLLQ_VALUE(RCC_OscInitStruct->PLL.PLLQ)); /* Disable the main PLL. */ __HAL_RCC_PLL_DISABLE(); - 800127e: 4b31 ldr r3, [pc, #196] ; (8001344 ) - 8001280: 2200 movs r2, #0 - 8001282: 601a str r2, [r3, #0] + 8001336: 4b31 ldr r3, [pc, #196] ; (80013fc ) + 8001338: 2200 movs r2, #0 + 800133a: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 8001284: f7ff fb92 bl 80009ac - 8001288: 6138 str r0, [r7, #16] + 800133c: f7ff fb7a bl 8000a34 + 8001340: 6138 str r0, [r7, #16] /* Wait till PLL is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) - 800128a: e008 b.n 800129e + 8001342: e008 b.n 8001356 { if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) - 800128c: f7ff fb8e bl 80009ac - 8001290: 4602 mov r2, r0 - 8001292: 693b ldr r3, [r7, #16] - 8001294: 1ad3 subs r3, r2, r3 - 8001296: 2b02 cmp r3, #2 - 8001298: d901 bls.n 800129e + 8001344: f7ff fb76 bl 8000a34 + 8001348: 4602 mov r2, r0 + 800134a: 693b ldr r3, [r7, #16] + 800134c: 1ad3 subs r3, r2, r3 + 800134e: 2b02 cmp r3, #2 + 8001350: d901 bls.n 8001356 { return HAL_TIMEOUT; - 800129a: 2303 movs r3, #3 - 800129c: e087 b.n 80013ae + 8001352: 2303 movs r3, #3 + 8001354: e087 b.n 8001466 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) - 800129e: 4b27 ldr r3, [pc, #156] ; (800133c ) - 80012a0: 681b ldr r3, [r3, #0] - 80012a2: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 - 80012a6: 2b00 cmp r3, #0 - 80012a8: d1f0 bne.n 800128c + 8001356: 4b27 ldr r3, [pc, #156] ; (80013f4 ) + 8001358: 681b ldr r3, [r3, #0] + 800135a: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 + 800135e: 2b00 cmp r3, #0 + 8001360: d1f0 bne.n 8001344 } } /* Configure the main PLL clock source, multiplication and division factors. */ WRITE_REG(RCC->PLLCFGR, (RCC_OscInitStruct->PLL.PLLSource | \ - 80012aa: 687b ldr r3, [r7, #4] - 80012ac: 69da ldr r2, [r3, #28] - 80012ae: 687b ldr r3, [r7, #4] - 80012b0: 6a1b ldr r3, [r3, #32] - 80012b2: 431a orrs r2, r3 - 80012b4: 687b ldr r3, [r7, #4] - 80012b6: 6a5b ldr r3, [r3, #36] ; 0x24 - 80012b8: 019b lsls r3, r3, #6 - 80012ba: 431a orrs r2, r3 - 80012bc: 687b ldr r3, [r7, #4] - 80012be: 6a9b ldr r3, [r3, #40] ; 0x28 - 80012c0: 085b lsrs r3, r3, #1 - 80012c2: 3b01 subs r3, #1 - 80012c4: 041b lsls r3, r3, #16 - 80012c6: 431a orrs r2, r3 - 80012c8: 687b ldr r3, [r7, #4] - 80012ca: 6adb ldr r3, [r3, #44] ; 0x2c - 80012cc: 061b lsls r3, r3, #24 - 80012ce: 491b ldr r1, [pc, #108] ; (800133c ) - 80012d0: 4313 orrs r3, r2 - 80012d2: 604b str r3, [r1, #4] + 8001362: 687b ldr r3, [r7, #4] + 8001364: 69da ldr r2, [r3, #28] + 8001366: 687b ldr r3, [r7, #4] + 8001368: 6a1b ldr r3, [r3, #32] + 800136a: 431a orrs r2, r3 + 800136c: 687b ldr r3, [r7, #4] + 800136e: 6a5b ldr r3, [r3, #36] ; 0x24 + 8001370: 019b lsls r3, r3, #6 + 8001372: 431a orrs r2, r3 + 8001374: 687b ldr r3, [r7, #4] + 8001376: 6a9b ldr r3, [r3, #40] ; 0x28 + 8001378: 085b lsrs r3, r3, #1 + 800137a: 3b01 subs r3, #1 + 800137c: 041b lsls r3, r3, #16 + 800137e: 431a orrs r2, r3 + 8001380: 687b ldr r3, [r7, #4] + 8001382: 6adb ldr r3, [r3, #44] ; 0x2c + 8001384: 061b lsls r3, r3, #24 + 8001386: 491b ldr r1, [pc, #108] ; (80013f4 ) + 8001388: 4313 orrs r3, r2 + 800138a: 604b str r3, [r1, #4] RCC_OscInitStruct->PLL.PLLM | \ (RCC_OscInitStruct->PLL.PLLN << RCC_PLLCFGR_PLLN_Pos) | \ (((RCC_OscInitStruct->PLL.PLLP >> 1U) - 1U) << RCC_PLLCFGR_PLLP_Pos) | \ (RCC_OscInitStruct->PLL.PLLQ << RCC_PLLCFGR_PLLQ_Pos))); /* Enable the main PLL. */ __HAL_RCC_PLL_ENABLE(); - 80012d4: 4b1b ldr r3, [pc, #108] ; (8001344 ) - 80012d6: 2201 movs r2, #1 - 80012d8: 601a str r2, [r3, #0] + 800138c: 4b1b ldr r3, [pc, #108] ; (80013fc ) + 800138e: 2201 movs r2, #1 + 8001390: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 80012da: f7ff fb67 bl 80009ac - 80012de: 6138 str r0, [r7, #16] + 8001392: f7ff fb4f bl 8000a34 + 8001396: 6138 str r0, [r7, #16] /* Wait till PLL is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) - 80012e0: e008 b.n 80012f4 + 8001398: e008 b.n 80013ac { if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) - 80012e2: f7ff fb63 bl 80009ac - 80012e6: 4602 mov r2, r0 - 80012e8: 693b ldr r3, [r7, #16] - 80012ea: 1ad3 subs r3, r2, r3 - 80012ec: 2b02 cmp r3, #2 - 80012ee: d901 bls.n 80012f4 + 800139a: f7ff fb4b bl 8000a34 + 800139e: 4602 mov r2, r0 + 80013a0: 693b ldr r3, [r7, #16] + 80013a2: 1ad3 subs r3, r2, r3 + 80013a4: 2b02 cmp r3, #2 + 80013a6: d901 bls.n 80013ac { return HAL_TIMEOUT; - 80012f0: 2303 movs r3, #3 - 80012f2: e05c b.n 80013ae + 80013a8: 2303 movs r3, #3 + 80013aa: e05c b.n 8001466 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) - 80012f4: 4b11 ldr r3, [pc, #68] ; (800133c ) - 80012f6: 681b ldr r3, [r3, #0] - 80012f8: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 - 80012fc: 2b00 cmp r3, #0 - 80012fe: d0f0 beq.n 80012e2 - 8001300: e054 b.n 80013ac + 80013ac: 4b11 ldr r3, [pc, #68] ; (80013f4 ) + 80013ae: 681b ldr r3, [r3, #0] + 80013b0: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 + 80013b4: 2b00 cmp r3, #0 + 80013b6: d0f0 beq.n 800139a + 80013b8: e054 b.n 8001464 } } else { /* Disable the main PLL. */ __HAL_RCC_PLL_DISABLE(); - 8001302: 4b10 ldr r3, [pc, #64] ; (8001344 ) - 8001304: 2200 movs r2, #0 - 8001306: 601a str r2, [r3, #0] + 80013ba: 4b10 ldr r3, [pc, #64] ; (80013fc ) + 80013bc: 2200 movs r2, #0 + 80013be: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 8001308: f7ff fb50 bl 80009ac - 800130c: 6138 str r0, [r7, #16] + 80013c0: f7ff fb38 bl 8000a34 + 80013c4: 6138 str r0, [r7, #16] /* Wait till PLL is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) - 800130e: e008 b.n 8001322 + 80013c6: e008 b.n 80013da { if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) - 8001310: f7ff fb4c bl 80009ac - 8001314: 4602 mov r2, r0 - 8001316: 693b ldr r3, [r7, #16] - 8001318: 1ad3 subs r3, r2, r3 - 800131a: 2b02 cmp r3, #2 - 800131c: d901 bls.n 8001322 + 80013c8: f7ff fb34 bl 8000a34 + 80013cc: 4602 mov r2, r0 + 80013ce: 693b ldr r3, [r7, #16] + 80013d0: 1ad3 subs r3, r2, r3 + 80013d2: 2b02 cmp r3, #2 + 80013d4: d901 bls.n 80013da { return HAL_TIMEOUT; - 800131e: 2303 movs r3, #3 - 8001320: e045 b.n 80013ae + 80013d6: 2303 movs r3, #3 + 80013d8: e045 b.n 8001466 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) - 8001322: 4b06 ldr r3, [pc, #24] ; (800133c ) - 8001324: 681b ldr r3, [r3, #0] - 8001326: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 - 800132a: 2b00 cmp r3, #0 - 800132c: d1f0 bne.n 8001310 - 800132e: e03d b.n 80013ac + 80013da: 4b06 ldr r3, [pc, #24] ; (80013f4 ) + 80013dc: 681b ldr r3, [r3, #0] + 80013de: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 + 80013e2: 2b00 cmp r3, #0 + 80013e4: d1f0 bne.n 80013c8 + 80013e6: e03d b.n 8001464 } } else { /* Check if there is a request to disable the PLL used as System clock source */ if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) - 8001330: 687b ldr r3, [r7, #4] - 8001332: 699b ldr r3, [r3, #24] - 8001334: 2b01 cmp r3, #1 - 8001336: d107 bne.n 8001348 + 80013e8: 687b ldr r3, [r7, #4] + 80013ea: 699b ldr r3, [r3, #24] + 80013ec: 2b01 cmp r3, #1 + 80013ee: d107 bne.n 8001400 { return HAL_ERROR; - 8001338: 2301 movs r3, #1 - 800133a: e038 b.n 80013ae - 800133c: 40023800 .word 0x40023800 - 8001340: 40007000 .word 0x40007000 - 8001344: 42470060 .word 0x42470060 + 80013f0: 2301 movs r3, #1 + 80013f2: e038 b.n 8001466 + 80013f4: 40023800 .word 0x40023800 + 80013f8: 40007000 .word 0x40007000 + 80013fc: 42470060 .word 0x42470060 } else { /* Do not return HAL_ERROR if request repeats the current configuration */ pll_config = RCC->PLLCFGR; - 8001348: 4b1b ldr r3, [pc, #108] ; (80013b8 ) - 800134a: 685b ldr r3, [r3, #4] - 800134c: 60fb str r3, [r7, #12] + 8001400: 4b1b ldr r3, [pc, #108] ; (8001470 ) + 8001402: 685b ldr r3, [r3, #4] + 8001404: 60fb str r3, [r7, #12] (READ_BIT(pll_config, RCC_PLLCFGR_PLLN) != (RCC_OscInitStruct->PLL.PLLN) << RCC_PLLCFGR_PLLN_Pos) || (READ_BIT(pll_config, RCC_PLLCFGR_PLLP) != (((RCC_OscInitStruct->PLL.PLLP >> 1U) - 1U)) << RCC_PLLCFGR_PLLP_Pos) || (READ_BIT(pll_config, RCC_PLLCFGR_PLLQ) != (RCC_OscInitStruct->PLL.PLLQ << RCC_PLLCFGR_PLLQ_Pos)) || (READ_BIT(pll_config, RCC_PLLCFGR_PLLR) != (RCC_OscInitStruct->PLL.PLLR << RCC_PLLCFGR_PLLR_Pos))) #else if (((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) || - 800134e: 687b ldr r3, [r7, #4] - 8001350: 699b ldr r3, [r3, #24] - 8001352: 2b01 cmp r3, #1 - 8001354: d028 beq.n 80013a8 + 8001406: 687b ldr r3, [r7, #4] + 8001408: 699b ldr r3, [r3, #24] + 800140a: 2b01 cmp r3, #1 + 800140c: d028 beq.n 8001460 (READ_BIT(pll_config, RCC_PLLCFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || - 8001356: 68fb ldr r3, [r7, #12] - 8001358: f403 0280 and.w r2, r3, #4194304 ; 0x400000 - 800135c: 687b ldr r3, [r7, #4] - 800135e: 69db ldr r3, [r3, #28] + 800140e: 68fb ldr r3, [r7, #12] + 8001410: f403 0280 and.w r2, r3, #4194304 ; 0x400000 + 8001414: 687b ldr r3, [r7, #4] + 8001416: 69db ldr r3, [r3, #28] if (((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) || - 8001360: 429a cmp r2, r3 - 8001362: d121 bne.n 80013a8 + 8001418: 429a cmp r2, r3 + 800141a: d121 bne.n 8001460 (READ_BIT(pll_config, RCC_PLLCFGR_PLLM) != (RCC_OscInitStruct->PLL.PLLM) << RCC_PLLCFGR_PLLM_Pos) || - 8001364: 68fb ldr r3, [r7, #12] - 8001366: f003 023f and.w r2, r3, #63 ; 0x3f - 800136a: 687b ldr r3, [r7, #4] - 800136c: 6a1b ldr r3, [r3, #32] + 800141c: 68fb ldr r3, [r7, #12] + 800141e: f003 023f and.w r2, r3, #63 ; 0x3f + 8001422: 687b ldr r3, [r7, #4] + 8001424: 6a1b ldr r3, [r3, #32] (READ_BIT(pll_config, RCC_PLLCFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || - 800136e: 429a cmp r2, r3 - 8001370: d11a bne.n 80013a8 + 8001426: 429a cmp r2, r3 + 8001428: d11a bne.n 8001460 (READ_BIT(pll_config, RCC_PLLCFGR_PLLN) != (RCC_OscInitStruct->PLL.PLLN) << RCC_PLLCFGR_PLLN_Pos) || - 8001372: 68fa ldr r2, [r7, #12] - 8001374: f647 73c0 movw r3, #32704 ; 0x7fc0 - 8001378: 4013 ands r3, r2 - 800137a: 687a ldr r2, [r7, #4] - 800137c: 6a52 ldr r2, [r2, #36] ; 0x24 - 800137e: 0192 lsls r2, r2, #6 + 800142a: 68fa ldr r2, [r7, #12] + 800142c: f647 73c0 movw r3, #32704 ; 0x7fc0 + 8001430: 4013 ands r3, r2 + 8001432: 687a ldr r2, [r7, #4] + 8001434: 6a52 ldr r2, [r2, #36] ; 0x24 + 8001436: 0192 lsls r2, r2, #6 (READ_BIT(pll_config, RCC_PLLCFGR_PLLM) != (RCC_OscInitStruct->PLL.PLLM) << RCC_PLLCFGR_PLLM_Pos) || - 8001380: 4293 cmp r3, r2 - 8001382: d111 bne.n 80013a8 + 8001438: 4293 cmp r3, r2 + 800143a: d111 bne.n 8001460 (READ_BIT(pll_config, RCC_PLLCFGR_PLLP) != (((RCC_OscInitStruct->PLL.PLLP >> 1U) - 1U)) << RCC_PLLCFGR_PLLP_Pos) || - 8001384: 68fb ldr r3, [r7, #12] - 8001386: f403 3240 and.w r2, r3, #196608 ; 0x30000 - 800138a: 687b ldr r3, [r7, #4] - 800138c: 6a9b ldr r3, [r3, #40] ; 0x28 - 800138e: 085b lsrs r3, r3, #1 - 8001390: 3b01 subs r3, #1 - 8001392: 041b lsls r3, r3, #16 + 800143c: 68fb ldr r3, [r7, #12] + 800143e: f403 3240 and.w r2, r3, #196608 ; 0x30000 + 8001442: 687b ldr r3, [r7, #4] + 8001444: 6a9b ldr r3, [r3, #40] ; 0x28 + 8001446: 085b lsrs r3, r3, #1 + 8001448: 3b01 subs r3, #1 + 800144a: 041b lsls r3, r3, #16 (READ_BIT(pll_config, RCC_PLLCFGR_PLLN) != (RCC_OscInitStruct->PLL.PLLN) << RCC_PLLCFGR_PLLN_Pos) || - 8001394: 429a cmp r2, r3 - 8001396: d107 bne.n 80013a8 + 800144c: 429a cmp r2, r3 + 800144e: d107 bne.n 8001460 (READ_BIT(pll_config, RCC_PLLCFGR_PLLQ) != (RCC_OscInitStruct->PLL.PLLQ << RCC_PLLCFGR_PLLQ_Pos))) - 8001398: 68fb ldr r3, [r7, #12] - 800139a: f003 6270 and.w r2, r3, #251658240 ; 0xf000000 - 800139e: 687b ldr r3, [r7, #4] - 80013a0: 6adb ldr r3, [r3, #44] ; 0x2c - 80013a2: 061b lsls r3, r3, #24 + 8001450: 68fb ldr r3, [r7, #12] + 8001452: f003 6270 and.w r2, r3, #251658240 ; 0xf000000 + 8001456: 687b ldr r3, [r7, #4] + 8001458: 6adb ldr r3, [r3, #44] ; 0x2c + 800145a: 061b lsls r3, r3, #24 (READ_BIT(pll_config, RCC_PLLCFGR_PLLP) != (((RCC_OscInitStruct->PLL.PLLP >> 1U) - 1U)) << RCC_PLLCFGR_PLLP_Pos) || - 80013a4: 429a cmp r2, r3 - 80013a6: d001 beq.n 80013ac + 800145c: 429a cmp r2, r3 + 800145e: d001 beq.n 8001464 #endif { return HAL_ERROR; - 80013a8: 2301 movs r3, #1 - 80013aa: e000 b.n 80013ae + 8001460: 2301 movs r3, #1 + 8001462: e000 b.n 8001466 } } } } return HAL_OK; - 80013ac: 2300 movs r3, #0 + 8001464: 2300 movs r3, #0 } - 80013ae: 4618 mov r0, r3 - 80013b0: 3718 adds r7, #24 - 80013b2: 46bd mov sp, r7 - 80013b4: bd80 pop {r7, pc} - 80013b6: bf00 nop - 80013b8: 40023800 .word 0x40023800 + 8001466: 4618 mov r0, r3 + 8001468: 3718 adds r7, #24 + 800146a: 46bd mov sp, r7 + 800146c: bd80 pop {r7, pc} + 800146e: bf00 nop + 8001470: 40023800 .word 0x40023800 -080013bc : +08001474 : * HPRE[3:0] bits to ensure that HCLK not exceed the maximum allowed frequency * (for more details refer to section above "Initialization/de-initialization functions") * @retval None */ HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency) { - 80013bc: b580 push {r7, lr} - 80013be: b084 sub sp, #16 - 80013c0: af00 add r7, sp, #0 - 80013c2: 6078 str r0, [r7, #4] - 80013c4: 6039 str r1, [r7, #0] + 8001474: b580 push {r7, lr} + 8001476: b084 sub sp, #16 + 8001478: af00 add r7, sp, #0 + 800147a: 6078 str r0, [r7, #4] + 800147c: 6039 str r1, [r7, #0] uint32_t tickstart; /* Check Null pointer */ if(RCC_ClkInitStruct == NULL) - 80013c6: 687b ldr r3, [r7, #4] - 80013c8: 2b00 cmp r3, #0 - 80013ca: d101 bne.n 80013d0 + 800147e: 687b ldr r3, [r7, #4] + 8001480: 2b00 cmp r3, #0 + 8001482: d101 bne.n 8001488 { return HAL_ERROR; - 80013cc: 2301 movs r3, #1 - 80013ce: e0cc b.n 800156a + 8001484: 2301 movs r3, #1 + 8001486: e0cc b.n 8001622 /* To correctly read data from FLASH memory, the number of wait states (LATENCY) must be correctly programmed according to the frequency of the CPU clock (HCLK) and the supply voltage of the device. */ /* Increasing the number of wait states because of higher CPU frequency */ if(FLatency > __HAL_FLASH_GET_LATENCY()) - 80013d0: 4b68 ldr r3, [pc, #416] ; (8001574 ) - 80013d2: 681b ldr r3, [r3, #0] - 80013d4: f003 0307 and.w r3, r3, #7 - 80013d8: 683a ldr r2, [r7, #0] - 80013da: 429a cmp r2, r3 - 80013dc: d90c bls.n 80013f8 + 8001488: 4b68 ldr r3, [pc, #416] ; (800162c ) + 800148a: 681b ldr r3, [r3, #0] + 800148c: f003 0307 and.w r3, r3, #7 + 8001490: 683a ldr r2, [r7, #0] + 8001492: 429a cmp r2, r3 + 8001494: d90c bls.n 80014b0 { /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ __HAL_FLASH_SET_LATENCY(FLatency); - 80013de: 4b65 ldr r3, [pc, #404] ; (8001574 ) - 80013e0: 683a ldr r2, [r7, #0] - 80013e2: b2d2 uxtb r2, r2 - 80013e4: 701a strb r2, [r3, #0] + 8001496: 4b65 ldr r3, [pc, #404] ; (800162c ) + 8001498: 683a ldr r2, [r7, #0] + 800149a: b2d2 uxtb r2, r2 + 800149c: 701a strb r2, [r3, #0] /* Check that the new number of wait states is taken into account to access the Flash memory by reading the FLASH_ACR register */ if(__HAL_FLASH_GET_LATENCY() != FLatency) - 80013e6: 4b63 ldr r3, [pc, #396] ; (8001574 ) - 80013e8: 681b ldr r3, [r3, #0] - 80013ea: f003 0307 and.w r3, r3, #7 - 80013ee: 683a ldr r2, [r7, #0] - 80013f0: 429a cmp r2, r3 - 80013f2: d001 beq.n 80013f8 + 800149e: 4b63 ldr r3, [pc, #396] ; (800162c ) + 80014a0: 681b ldr r3, [r3, #0] + 80014a2: f003 0307 and.w r3, r3, #7 + 80014a6: 683a ldr r2, [r7, #0] + 80014a8: 429a cmp r2, r3 + 80014aa: d001 beq.n 80014b0 { return HAL_ERROR; - 80013f4: 2301 movs r3, #1 - 80013f6: e0b8 b.n 800156a + 80014ac: 2301 movs r3, #1 + 80014ae: e0b8 b.n 8001622 } } /*-------------------------- HCLK Configuration --------------------------*/ if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK) - 80013f8: 687b ldr r3, [r7, #4] - 80013fa: 681b ldr r3, [r3, #0] - 80013fc: f003 0302 and.w r3, r3, #2 - 8001400: 2b00 cmp r3, #0 - 8001402: d020 beq.n 8001446 + 80014b0: 687b ldr r3, [r7, #4] + 80014b2: 681b ldr r3, [r3, #0] + 80014b4: f003 0302 and.w r3, r3, #2 + 80014b8: 2b00 cmp r3, #0 + 80014ba: d020 beq.n 80014fe { /* Set the highest APBx dividers in order to ensure that we do not go through a non-spec phase whatever we decrease or increase HCLK. */ if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) - 8001404: 687b ldr r3, [r7, #4] - 8001406: 681b ldr r3, [r3, #0] - 8001408: f003 0304 and.w r3, r3, #4 - 800140c: 2b00 cmp r3, #0 - 800140e: d005 beq.n 800141c + 80014bc: 687b ldr r3, [r7, #4] + 80014be: 681b ldr r3, [r3, #0] + 80014c0: f003 0304 and.w r3, r3, #4 + 80014c4: 2b00 cmp r3, #0 + 80014c6: d005 beq.n 80014d4 { MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16); - 8001410: 4b59 ldr r3, [pc, #356] ; (8001578 ) - 8001412: 689b ldr r3, [r3, #8] - 8001414: 4a58 ldr r2, [pc, #352] ; (8001578 ) - 8001416: f443 53e0 orr.w r3, r3, #7168 ; 0x1c00 - 800141a: 6093 str r3, [r2, #8] + 80014c8: 4b59 ldr r3, [pc, #356] ; (8001630 ) + 80014ca: 689b ldr r3, [r3, #8] + 80014cc: 4a58 ldr r2, [pc, #352] ; (8001630 ) + 80014ce: f443 53e0 orr.w r3, r3, #7168 ; 0x1c00 + 80014d2: 6093 str r3, [r2, #8] } if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) - 800141c: 687b ldr r3, [r7, #4] - 800141e: 681b ldr r3, [r3, #0] - 8001420: f003 0308 and.w r3, r3, #8 - 8001424: 2b00 cmp r3, #0 - 8001426: d005 beq.n 8001434 + 80014d4: 687b ldr r3, [r7, #4] + 80014d6: 681b ldr r3, [r3, #0] + 80014d8: f003 0308 and.w r3, r3, #8 + 80014dc: 2b00 cmp r3, #0 + 80014de: d005 beq.n 80014ec { MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3)); - 8001428: 4b53 ldr r3, [pc, #332] ; (8001578 ) - 800142a: 689b ldr r3, [r3, #8] - 800142c: 4a52 ldr r2, [pc, #328] ; (8001578 ) - 800142e: f443 4360 orr.w r3, r3, #57344 ; 0xe000 - 8001432: 6093 str r3, [r2, #8] + 80014e0: 4b53 ldr r3, [pc, #332] ; (8001630 ) + 80014e2: 689b ldr r3, [r3, #8] + 80014e4: 4a52 ldr r2, [pc, #328] ; (8001630 ) + 80014e6: f443 4360 orr.w r3, r3, #57344 ; 0xe000 + 80014ea: 6093 str r3, [r2, #8] } assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); - 8001434: 4b50 ldr r3, [pc, #320] ; (8001578 ) - 8001436: 689b ldr r3, [r3, #8] - 8001438: f023 02f0 bic.w r2, r3, #240 ; 0xf0 - 800143c: 687b ldr r3, [r7, #4] - 800143e: 689b ldr r3, [r3, #8] - 8001440: 494d ldr r1, [pc, #308] ; (8001578 ) - 8001442: 4313 orrs r3, r2 - 8001444: 608b str r3, [r1, #8] + 80014ec: 4b50 ldr r3, [pc, #320] ; (8001630 ) + 80014ee: 689b ldr r3, [r3, #8] + 80014f0: f023 02f0 bic.w r2, r3, #240 ; 0xf0 + 80014f4: 687b ldr r3, [r7, #4] + 80014f6: 689b ldr r3, [r3, #8] + 80014f8: 494d ldr r1, [pc, #308] ; (8001630 ) + 80014fa: 4313 orrs r3, r2 + 80014fc: 608b str r3, [r1, #8] } /*------------------------- SYSCLK Configuration ---------------------------*/ if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK) - 8001446: 687b ldr r3, [r7, #4] - 8001448: 681b ldr r3, [r3, #0] - 800144a: f003 0301 and.w r3, r3, #1 - 800144e: 2b00 cmp r3, #0 - 8001450: d044 beq.n 80014dc + 80014fe: 687b ldr r3, [r7, #4] + 8001500: 681b ldr r3, [r3, #0] + 8001502: f003 0301 and.w r3, r3, #1 + 8001506: 2b00 cmp r3, #0 + 8001508: d044 beq.n 8001594 { assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource)); /* HSE is selected as System Clock Source */ if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) - 8001452: 687b ldr r3, [r7, #4] - 8001454: 685b ldr r3, [r3, #4] - 8001456: 2b01 cmp r3, #1 - 8001458: d107 bne.n 800146a + 800150a: 687b ldr r3, [r7, #4] + 800150c: 685b ldr r3, [r3, #4] + 800150e: 2b01 cmp r3, #1 + 8001510: d107 bne.n 8001522 { /* Check the HSE ready flag */ if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) - 800145a: 4b47 ldr r3, [pc, #284] ; (8001578 ) - 800145c: 681b ldr r3, [r3, #0] - 800145e: f403 3300 and.w r3, r3, #131072 ; 0x20000 - 8001462: 2b00 cmp r3, #0 - 8001464: d119 bne.n 800149a + 8001512: 4b47 ldr r3, [pc, #284] ; (8001630 ) + 8001514: 681b ldr r3, [r3, #0] + 8001516: f403 3300 and.w r3, r3, #131072 ; 0x20000 + 800151a: 2b00 cmp r3, #0 + 800151c: d119 bne.n 8001552 { return HAL_ERROR; - 8001466: 2301 movs r3, #1 - 8001468: e07f b.n 800156a + 800151e: 2301 movs r3, #1 + 8001520: e07f b.n 8001622 } } /* PLL is selected as System Clock Source */ else if((RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) || - 800146a: 687b ldr r3, [r7, #4] - 800146c: 685b ldr r3, [r3, #4] - 800146e: 2b02 cmp r3, #2 - 8001470: d003 beq.n 800147a + 8001522: 687b ldr r3, [r7, #4] + 8001524: 685b ldr r3, [r3, #4] + 8001526: 2b02 cmp r3, #2 + 8001528: d003 beq.n 8001532 (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLRCLK)) - 8001472: 687b ldr r3, [r7, #4] - 8001474: 685b ldr r3, [r3, #4] + 800152a: 687b ldr r3, [r7, #4] + 800152c: 685b ldr r3, [r3, #4] else if((RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) || - 8001476: 2b03 cmp r3, #3 - 8001478: d107 bne.n 800148a + 800152e: 2b03 cmp r3, #3 + 8001530: d107 bne.n 8001542 { /* Check the PLL ready flag */ if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) - 800147a: 4b3f ldr r3, [pc, #252] ; (8001578 ) - 800147c: 681b ldr r3, [r3, #0] - 800147e: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 - 8001482: 2b00 cmp r3, #0 - 8001484: d109 bne.n 800149a + 8001532: 4b3f ldr r3, [pc, #252] ; (8001630 ) + 8001534: 681b ldr r3, [r3, #0] + 8001536: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 + 800153a: 2b00 cmp r3, #0 + 800153c: d109 bne.n 8001552 { return HAL_ERROR; - 8001486: 2301 movs r3, #1 - 8001488: e06f b.n 800156a + 800153e: 2301 movs r3, #1 + 8001540: e06f b.n 8001622 } /* HSI is selected as System Clock Source */ else { /* Check the HSI ready flag */ if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) - 800148a: 4b3b ldr r3, [pc, #236] ; (8001578 ) - 800148c: 681b ldr r3, [r3, #0] - 800148e: f003 0302 and.w r3, r3, #2 - 8001492: 2b00 cmp r3, #0 - 8001494: d101 bne.n 800149a + 8001542: 4b3b ldr r3, [pc, #236] ; (8001630 ) + 8001544: 681b ldr r3, [r3, #0] + 8001546: f003 0302 and.w r3, r3, #2 + 800154a: 2b00 cmp r3, #0 + 800154c: d101 bne.n 8001552 { return HAL_ERROR; - 8001496: 2301 movs r3, #1 - 8001498: e067 b.n 800156a + 800154e: 2301 movs r3, #1 + 8001550: e067 b.n 8001622 } } __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource); - 800149a: 4b37 ldr r3, [pc, #220] ; (8001578 ) - 800149c: 689b ldr r3, [r3, #8] - 800149e: f023 0203 bic.w r2, r3, #3 - 80014a2: 687b ldr r3, [r7, #4] - 80014a4: 685b ldr r3, [r3, #4] - 80014a6: 4934 ldr r1, [pc, #208] ; (8001578 ) - 80014a8: 4313 orrs r3, r2 - 80014aa: 608b str r3, [r1, #8] + 8001552: 4b37 ldr r3, [pc, #220] ; (8001630 ) + 8001554: 689b ldr r3, [r3, #8] + 8001556: f023 0203 bic.w r2, r3, #3 + 800155a: 687b ldr r3, [r7, #4] + 800155c: 685b ldr r3, [r3, #4] + 800155e: 4934 ldr r1, [pc, #208] ; (8001630 ) + 8001560: 4313 orrs r3, r2 + 8001562: 608b str r3, [r1, #8] /* Get Start Tick */ tickstart = HAL_GetTick(); - 80014ac: f7ff fa7e bl 80009ac - 80014b0: 60f8 str r0, [r7, #12] + 8001564: f7ff fa66 bl 8000a34 + 8001568: 60f8 str r0, [r7, #12] while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos)) - 80014b2: e00a b.n 80014ca + 800156a: e00a b.n 8001582 { if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE) - 80014b4: f7ff fa7a bl 80009ac - 80014b8: 4602 mov r2, r0 - 80014ba: 68fb ldr r3, [r7, #12] - 80014bc: 1ad3 subs r3, r2, r3 - 80014be: f241 3288 movw r2, #5000 ; 0x1388 - 80014c2: 4293 cmp r3, r2 - 80014c4: d901 bls.n 80014ca + 800156c: f7ff fa62 bl 8000a34 + 8001570: 4602 mov r2, r0 + 8001572: 68fb ldr r3, [r7, #12] + 8001574: 1ad3 subs r3, r2, r3 + 8001576: f241 3288 movw r2, #5000 ; 0x1388 + 800157a: 4293 cmp r3, r2 + 800157c: d901 bls.n 8001582 { return HAL_TIMEOUT; - 80014c6: 2303 movs r3, #3 - 80014c8: e04f b.n 800156a + 800157e: 2303 movs r3, #3 + 8001580: e04f b.n 8001622 while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos)) - 80014ca: 4b2b ldr r3, [pc, #172] ; (8001578 ) - 80014cc: 689b ldr r3, [r3, #8] - 80014ce: f003 020c and.w r2, r3, #12 - 80014d2: 687b ldr r3, [r7, #4] - 80014d4: 685b ldr r3, [r3, #4] - 80014d6: 009b lsls r3, r3, #2 - 80014d8: 429a cmp r2, r3 - 80014da: d1eb bne.n 80014b4 + 8001582: 4b2b ldr r3, [pc, #172] ; (8001630 ) + 8001584: 689b ldr r3, [r3, #8] + 8001586: f003 020c and.w r2, r3, #12 + 800158a: 687b ldr r3, [r7, #4] + 800158c: 685b ldr r3, [r3, #4] + 800158e: 009b lsls r3, r3, #2 + 8001590: 429a cmp r2, r3 + 8001592: d1eb bne.n 800156c } } } /* Decreasing the number of wait states because of lower CPU frequency */ if(FLatency < __HAL_FLASH_GET_LATENCY()) - 80014dc: 4b25 ldr r3, [pc, #148] ; (8001574 ) - 80014de: 681b ldr r3, [r3, #0] - 80014e0: f003 0307 and.w r3, r3, #7 - 80014e4: 683a ldr r2, [r7, #0] - 80014e6: 429a cmp r2, r3 - 80014e8: d20c bcs.n 8001504 + 8001594: 4b25 ldr r3, [pc, #148] ; (800162c ) + 8001596: 681b ldr r3, [r3, #0] + 8001598: f003 0307 and.w r3, r3, #7 + 800159c: 683a ldr r2, [r7, #0] + 800159e: 429a cmp r2, r3 + 80015a0: d20c bcs.n 80015bc { /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ __HAL_FLASH_SET_LATENCY(FLatency); - 80014ea: 4b22 ldr r3, [pc, #136] ; (8001574 ) - 80014ec: 683a ldr r2, [r7, #0] - 80014ee: b2d2 uxtb r2, r2 - 80014f0: 701a strb r2, [r3, #0] + 80015a2: 4b22 ldr r3, [pc, #136] ; (800162c ) + 80015a4: 683a ldr r2, [r7, #0] + 80015a6: b2d2 uxtb r2, r2 + 80015a8: 701a strb r2, [r3, #0] /* Check that the new number of wait states is taken into account to access the Flash memory by reading the FLASH_ACR register */ if(__HAL_FLASH_GET_LATENCY() != FLatency) - 80014f2: 4b20 ldr r3, [pc, #128] ; (8001574 ) - 80014f4: 681b ldr r3, [r3, #0] - 80014f6: f003 0307 and.w r3, r3, #7 - 80014fa: 683a ldr r2, [r7, #0] - 80014fc: 429a cmp r2, r3 - 80014fe: d001 beq.n 8001504 + 80015aa: 4b20 ldr r3, [pc, #128] ; (800162c ) + 80015ac: 681b ldr r3, [r3, #0] + 80015ae: f003 0307 and.w r3, r3, #7 + 80015b2: 683a ldr r2, [r7, #0] + 80015b4: 429a cmp r2, r3 + 80015b6: d001 beq.n 80015bc { return HAL_ERROR; - 8001500: 2301 movs r3, #1 - 8001502: e032 b.n 800156a + 80015b8: 2301 movs r3, #1 + 80015ba: e032 b.n 8001622 } } /*-------------------------- PCLK1 Configuration ---------------------------*/ if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) - 8001504: 687b ldr r3, [r7, #4] - 8001506: 681b ldr r3, [r3, #0] - 8001508: f003 0304 and.w r3, r3, #4 - 800150c: 2b00 cmp r3, #0 - 800150e: d008 beq.n 8001522 + 80015bc: 687b ldr r3, [r7, #4] + 80015be: 681b ldr r3, [r3, #0] + 80015c0: f003 0304 and.w r3, r3, #4 + 80015c4: 2b00 cmp r3, #0 + 80015c6: d008 beq.n 80015da { assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider); - 8001510: 4b19 ldr r3, [pc, #100] ; (8001578 ) - 8001512: 689b ldr r3, [r3, #8] - 8001514: f423 52e0 bic.w r2, r3, #7168 ; 0x1c00 - 8001518: 687b ldr r3, [r7, #4] - 800151a: 68db ldr r3, [r3, #12] - 800151c: 4916 ldr r1, [pc, #88] ; (8001578 ) - 800151e: 4313 orrs r3, r2 - 8001520: 608b str r3, [r1, #8] + 80015c8: 4b19 ldr r3, [pc, #100] ; (8001630 ) + 80015ca: 689b ldr r3, [r3, #8] + 80015cc: f423 52e0 bic.w r2, r3, #7168 ; 0x1c00 + 80015d0: 687b ldr r3, [r7, #4] + 80015d2: 68db ldr r3, [r3, #12] + 80015d4: 4916 ldr r1, [pc, #88] ; (8001630 ) + 80015d6: 4313 orrs r3, r2 + 80015d8: 608b str r3, [r1, #8] } /*-------------------------- PCLK2 Configuration ---------------------------*/ if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) - 8001522: 687b ldr r3, [r7, #4] - 8001524: 681b ldr r3, [r3, #0] - 8001526: f003 0308 and.w r3, r3, #8 - 800152a: 2b00 cmp r3, #0 - 800152c: d009 beq.n 8001542 + 80015da: 687b ldr r3, [r7, #4] + 80015dc: 681b ldr r3, [r3, #0] + 80015de: f003 0308 and.w r3, r3, #8 + 80015e2: 2b00 cmp r3, #0 + 80015e4: d009 beq.n 80015fa { assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3U)); - 800152e: 4b12 ldr r3, [pc, #72] ; (8001578 ) - 8001530: 689b ldr r3, [r3, #8] - 8001532: f423 4260 bic.w r2, r3, #57344 ; 0xe000 - 8001536: 687b ldr r3, [r7, #4] - 8001538: 691b ldr r3, [r3, #16] - 800153a: 00db lsls r3, r3, #3 - 800153c: 490e ldr r1, [pc, #56] ; (8001578 ) - 800153e: 4313 orrs r3, r2 - 8001540: 608b str r3, [r1, #8] + 80015e6: 4b12 ldr r3, [pc, #72] ; (8001630 ) + 80015e8: 689b ldr r3, [r3, #8] + 80015ea: f423 4260 bic.w r2, r3, #57344 ; 0xe000 + 80015ee: 687b ldr r3, [r7, #4] + 80015f0: 691b ldr r3, [r3, #16] + 80015f2: 00db lsls r3, r3, #3 + 80015f4: 490e ldr r1, [pc, #56] ; (8001630 ) + 80015f6: 4313 orrs r3, r2 + 80015f8: 608b str r3, [r1, #8] } /* Update the SystemCoreClock global variable */ SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> RCC_CFGR_HPRE_Pos]; - 8001542: f000 f821 bl 8001588 - 8001546: 4602 mov r2, r0 - 8001548: 4b0b ldr r3, [pc, #44] ; (8001578 ) - 800154a: 689b ldr r3, [r3, #8] - 800154c: 091b lsrs r3, r3, #4 - 800154e: f003 030f and.w r3, r3, #15 - 8001552: 490a ldr r1, [pc, #40] ; (800157c ) - 8001554: 5ccb ldrb r3, [r1, r3] - 8001556: fa22 f303 lsr.w r3, r2, r3 - 800155a: 4a09 ldr r2, [pc, #36] ; (8001580 ) - 800155c: 6013 str r3, [r2, #0] + 80015fa: f000 f821 bl 8001640 + 80015fe: 4602 mov r2, r0 + 8001600: 4b0b ldr r3, [pc, #44] ; (8001630 ) + 8001602: 689b ldr r3, [r3, #8] + 8001604: 091b lsrs r3, r3, #4 + 8001606: f003 030f and.w r3, r3, #15 + 800160a: 490a ldr r1, [pc, #40] ; (8001634 ) + 800160c: 5ccb ldrb r3, [r1, r3] + 800160e: fa22 f303 lsr.w r3, r2, r3 + 8001612: 4a09 ldr r2, [pc, #36] ; (8001638 ) + 8001614: 6013 str r3, [r2, #0] /* Configure the source of time base considering new system clocks settings */ HAL_InitTick (uwTickPrio); - 800155e: 4b09 ldr r3, [pc, #36] ; (8001584 ) - 8001560: 681b ldr r3, [r3, #0] - 8001562: 4618 mov r0, r3 - 8001564: f7ff f9de bl 8000924 + 8001616: 4b09 ldr r3, [pc, #36] ; (800163c ) + 8001618: 681b ldr r3, [r3, #0] + 800161a: 4618 mov r0, r3 + 800161c: f7ff f9c6 bl 80009ac return HAL_OK; - 8001568: 2300 movs r3, #0 + 8001620: 2300 movs r3, #0 } - 800156a: 4618 mov r0, r3 - 800156c: 3710 adds r7, #16 - 800156e: 46bd mov sp, r7 - 8001570: bd80 pop {r7, pc} - 8001572: bf00 nop - 8001574: 40023c00 .word 0x40023c00 - 8001578: 40023800 .word 0x40023800 - 800157c: 08001ff8 .word 0x08001ff8 - 8001580: 20000000 .word 0x20000000 - 8001584: 20000004 .word 0x20000004 + 8001622: 4618 mov r0, r3 + 8001624: 3710 adds r7, #16 + 8001626: 46bd mov sp, r7 + 8001628: bd80 pop {r7, pc} + 800162a: bf00 nop + 800162c: 40023c00 .word 0x40023c00 + 8001630: 40023800 .word 0x40023800 + 8001634: 080021ec .word 0x080021ec + 8001638: 20000000 .word 0x20000000 + 800163c: 20000004 .word 0x20000004 -08001588 : +08001640 : * * * @retval SYSCLK frequency */ __weak uint32_t HAL_RCC_GetSysClockFreq(void) { - 8001588: e92d 4fb0 stmdb sp!, {r4, r5, r7, r8, r9, sl, fp, lr} - 800158c: b094 sub sp, #80 ; 0x50 - 800158e: af00 add r7, sp, #0 + 8001640: e92d 4fb0 stmdb sp!, {r4, r5, r7, r8, r9, sl, fp, lr} + 8001644: b094 sub sp, #80 ; 0x50 + 8001646: af00 add r7, sp, #0 uint32_t pllm = 0U, pllvco = 0U, pllp = 0U; - 8001590: 2300 movs r3, #0 - 8001592: 647b str r3, [r7, #68] ; 0x44 - 8001594: 2300 movs r3, #0 - 8001596: 64fb str r3, [r7, #76] ; 0x4c - 8001598: 2300 movs r3, #0 - 800159a: 643b str r3, [r7, #64] ; 0x40 + 8001648: 2300 movs r3, #0 + 800164a: 647b str r3, [r7, #68] ; 0x44 + 800164c: 2300 movs r3, #0 + 800164e: 64fb str r3, [r7, #76] ; 0x4c + 8001650: 2300 movs r3, #0 + 8001652: 643b str r3, [r7, #64] ; 0x40 uint32_t sysclockfreq = 0U; - 800159c: 2300 movs r3, #0 - 800159e: 64bb str r3, [r7, #72] ; 0x48 + 8001654: 2300 movs r3, #0 + 8001656: 64bb str r3, [r7, #72] ; 0x48 /* Get SYSCLK source -------------------------------------------------------*/ switch (RCC->CFGR & RCC_CFGR_SWS) - 80015a0: 4b79 ldr r3, [pc, #484] ; (8001788 ) - 80015a2: 689b ldr r3, [r3, #8] - 80015a4: f003 030c and.w r3, r3, #12 - 80015a8: 2b08 cmp r3, #8 - 80015aa: d00d beq.n 80015c8 - 80015ac: 2b08 cmp r3, #8 - 80015ae: f200 80e1 bhi.w 8001774 - 80015b2: 2b00 cmp r3, #0 - 80015b4: d002 beq.n 80015bc - 80015b6: 2b04 cmp r3, #4 - 80015b8: d003 beq.n 80015c2 - 80015ba: e0db b.n 8001774 + 8001658: 4b79 ldr r3, [pc, #484] ; (8001840 ) + 800165a: 689b ldr r3, [r3, #8] + 800165c: f003 030c and.w r3, r3, #12 + 8001660: 2b08 cmp r3, #8 + 8001662: d00d beq.n 8001680 + 8001664: 2b08 cmp r3, #8 + 8001666: f200 80e1 bhi.w 800182c + 800166a: 2b00 cmp r3, #0 + 800166c: d002 beq.n 8001674 + 800166e: 2b04 cmp r3, #4 + 8001670: d003 beq.n 800167a + 8001672: e0db b.n 800182c { case RCC_CFGR_SWS_HSI: /* HSI used as system clock source */ { sysclockfreq = HSI_VALUE; - 80015bc: 4b73 ldr r3, [pc, #460] ; (800178c ) - 80015be: 64bb str r3, [r7, #72] ; 0x48 + 8001674: 4b73 ldr r3, [pc, #460] ; (8001844 ) + 8001676: 64bb str r3, [r7, #72] ; 0x48 break; - 80015c0: e0db b.n 800177a + 8001678: e0db b.n 8001832 } case RCC_CFGR_SWS_HSE: /* HSE used as system clock source */ { sysclockfreq = HSE_VALUE; - 80015c2: 4b73 ldr r3, [pc, #460] ; (8001790 ) - 80015c4: 64bb str r3, [r7, #72] ; 0x48 + 800167a: 4b73 ldr r3, [pc, #460] ; (8001848 ) + 800167c: 64bb str r3, [r7, #72] ; 0x48 break; - 80015c6: e0d8 b.n 800177a + 800167e: e0d8 b.n 8001832 } case RCC_CFGR_SWS_PLL: /* PLL used as system clock source */ { /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN SYSCLK = PLL_VCO / PLLP */ pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM; - 80015c8: 4b6f ldr r3, [pc, #444] ; (8001788 ) - 80015ca: 685b ldr r3, [r3, #4] - 80015cc: f003 033f and.w r3, r3, #63 ; 0x3f - 80015d0: 647b str r3, [r7, #68] ; 0x44 + 8001680: 4b6f ldr r3, [pc, #444] ; (8001840 ) + 8001682: 685b ldr r3, [r3, #4] + 8001684: f003 033f and.w r3, r3, #63 ; 0x3f + 8001688: 647b str r3, [r7, #68] ; 0x44 if(__HAL_RCC_GET_PLL_OSCSOURCE() != RCC_PLLSOURCE_HSI) - 80015d2: 4b6d ldr r3, [pc, #436] ; (8001788 ) - 80015d4: 685b ldr r3, [r3, #4] - 80015d6: f403 0380 and.w r3, r3, #4194304 ; 0x400000 - 80015da: 2b00 cmp r3, #0 - 80015dc: d063 beq.n 80016a6 + 800168a: 4b6d ldr r3, [pc, #436] ; (8001840 ) + 800168c: 685b ldr r3, [r3, #4] + 800168e: f403 0380 and.w r3, r3, #4194304 ; 0x400000 + 8001692: 2b00 cmp r3, #0 + 8001694: d063 beq.n 800175e { /* HSE used as PLL clock source */ pllvco = (uint32_t) ((((uint64_t) HSE_VALUE * ((uint64_t) ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos)))) / (uint64_t)pllm); - 80015de: 4b6a ldr r3, [pc, #424] ; (8001788 ) - 80015e0: 685b ldr r3, [r3, #4] - 80015e2: 099b lsrs r3, r3, #6 - 80015e4: 2200 movs r2, #0 - 80015e6: 63bb str r3, [r7, #56] ; 0x38 - 80015e8: 63fa str r2, [r7, #60] ; 0x3c - 80015ea: 6bbb ldr r3, [r7, #56] ; 0x38 - 80015ec: f3c3 0308 ubfx r3, r3, #0, #9 - 80015f0: 633b str r3, [r7, #48] ; 0x30 - 80015f2: 2300 movs r3, #0 - 80015f4: 637b str r3, [r7, #52] ; 0x34 - 80015f6: e9d7 450c ldrd r4, r5, [r7, #48] ; 0x30 - 80015fa: 4622 mov r2, r4 - 80015fc: 462b mov r3, r5 - 80015fe: f04f 0000 mov.w r0, #0 - 8001602: f04f 0100 mov.w r1, #0 - 8001606: 0159 lsls r1, r3, #5 - 8001608: ea41 61d2 orr.w r1, r1, r2, lsr #27 - 800160c: 0150 lsls r0, r2, #5 - 800160e: 4602 mov r2, r0 - 8001610: 460b mov r3, r1 - 8001612: 4621 mov r1, r4 - 8001614: 1a51 subs r1, r2, r1 - 8001616: 6139 str r1, [r7, #16] - 8001618: 4629 mov r1, r5 - 800161a: eb63 0301 sbc.w r3, r3, r1 - 800161e: 617b str r3, [r7, #20] - 8001620: f04f 0200 mov.w r2, #0 - 8001624: f04f 0300 mov.w r3, #0 - 8001628: e9d7 ab04 ldrd sl, fp, [r7, #16] - 800162c: 4659 mov r1, fp - 800162e: 018b lsls r3, r1, #6 - 8001630: 4651 mov r1, sl - 8001632: ea43 6391 orr.w r3, r3, r1, lsr #26 - 8001636: 4651 mov r1, sl - 8001638: 018a lsls r2, r1, #6 - 800163a: 4651 mov r1, sl - 800163c: ebb2 0801 subs.w r8, r2, r1 - 8001640: 4659 mov r1, fp - 8001642: eb63 0901 sbc.w r9, r3, r1 - 8001646: f04f 0200 mov.w r2, #0 - 800164a: f04f 0300 mov.w r3, #0 - 800164e: ea4f 03c9 mov.w r3, r9, lsl #3 - 8001652: ea43 7358 orr.w r3, r3, r8, lsr #29 - 8001656: ea4f 02c8 mov.w r2, r8, lsl #3 - 800165a: 4690 mov r8, r2 - 800165c: 4699 mov r9, r3 - 800165e: 4623 mov r3, r4 - 8001660: eb18 0303 adds.w r3, r8, r3 - 8001664: 60bb str r3, [r7, #8] - 8001666: 462b mov r3, r5 - 8001668: eb49 0303 adc.w r3, r9, r3 - 800166c: 60fb str r3, [r7, #12] - 800166e: f04f 0200 mov.w r2, #0 - 8001672: f04f 0300 mov.w r3, #0 - 8001676: e9d7 4502 ldrd r4, r5, [r7, #8] - 800167a: 4629 mov r1, r5 - 800167c: 024b lsls r3, r1, #9 - 800167e: 4621 mov r1, r4 - 8001680: ea43 53d1 orr.w r3, r3, r1, lsr #23 - 8001684: 4621 mov r1, r4 - 8001686: 024a lsls r2, r1, #9 - 8001688: 4610 mov r0, r2 - 800168a: 4619 mov r1, r3 - 800168c: 6c7b ldr r3, [r7, #68] ; 0x44 - 800168e: 2200 movs r2, #0 - 8001690: 62bb str r3, [r7, #40] ; 0x28 - 8001692: 62fa str r2, [r7, #44] ; 0x2c - 8001694: e9d7 230a ldrd r2, r3, [r7, #40] ; 0x28 - 8001698: f7fe fd9e bl 80001d8 <__aeabi_uldivmod> - 800169c: 4602 mov r2, r0 - 800169e: 460b mov r3, r1 - 80016a0: 4613 mov r3, r2 - 80016a2: 64fb str r3, [r7, #76] ; 0x4c - 80016a4: e058 b.n 8001758 + 8001696: 4b6a ldr r3, [pc, #424] ; (8001840 ) + 8001698: 685b ldr r3, [r3, #4] + 800169a: 099b lsrs r3, r3, #6 + 800169c: 2200 movs r2, #0 + 800169e: 63bb str r3, [r7, #56] ; 0x38 + 80016a0: 63fa str r2, [r7, #60] ; 0x3c + 80016a2: 6bbb ldr r3, [r7, #56] ; 0x38 + 80016a4: f3c3 0308 ubfx r3, r3, #0, #9 + 80016a8: 633b str r3, [r7, #48] ; 0x30 + 80016aa: 2300 movs r3, #0 + 80016ac: 637b str r3, [r7, #52] ; 0x34 + 80016ae: e9d7 450c ldrd r4, r5, [r7, #48] ; 0x30 + 80016b2: 4622 mov r2, r4 + 80016b4: 462b mov r3, r5 + 80016b6: f04f 0000 mov.w r0, #0 + 80016ba: f04f 0100 mov.w r1, #0 + 80016be: 0159 lsls r1, r3, #5 + 80016c0: ea41 61d2 orr.w r1, r1, r2, lsr #27 + 80016c4: 0150 lsls r0, r2, #5 + 80016c6: 4602 mov r2, r0 + 80016c8: 460b mov r3, r1 + 80016ca: 4621 mov r1, r4 + 80016cc: 1a51 subs r1, r2, r1 + 80016ce: 6139 str r1, [r7, #16] + 80016d0: 4629 mov r1, r5 + 80016d2: eb63 0301 sbc.w r3, r3, r1 + 80016d6: 617b str r3, [r7, #20] + 80016d8: f04f 0200 mov.w r2, #0 + 80016dc: f04f 0300 mov.w r3, #0 + 80016e0: e9d7 ab04 ldrd sl, fp, [r7, #16] + 80016e4: 4659 mov r1, fp + 80016e6: 018b lsls r3, r1, #6 + 80016e8: 4651 mov r1, sl + 80016ea: ea43 6391 orr.w r3, r3, r1, lsr #26 + 80016ee: 4651 mov r1, sl + 80016f0: 018a lsls r2, r1, #6 + 80016f2: 4651 mov r1, sl + 80016f4: ebb2 0801 subs.w r8, r2, r1 + 80016f8: 4659 mov r1, fp + 80016fa: eb63 0901 sbc.w r9, r3, r1 + 80016fe: f04f 0200 mov.w r2, #0 + 8001702: f04f 0300 mov.w r3, #0 + 8001706: ea4f 03c9 mov.w r3, r9, lsl #3 + 800170a: ea43 7358 orr.w r3, r3, r8, lsr #29 + 800170e: ea4f 02c8 mov.w r2, r8, lsl #3 + 8001712: 4690 mov r8, r2 + 8001714: 4699 mov r9, r3 + 8001716: 4623 mov r3, r4 + 8001718: eb18 0303 adds.w r3, r8, r3 + 800171c: 60bb str r3, [r7, #8] + 800171e: 462b mov r3, r5 + 8001720: eb49 0303 adc.w r3, r9, r3 + 8001724: 60fb str r3, [r7, #12] + 8001726: f04f 0200 mov.w r2, #0 + 800172a: f04f 0300 mov.w r3, #0 + 800172e: e9d7 4502 ldrd r4, r5, [r7, #8] + 8001732: 4629 mov r1, r5 + 8001734: 024b lsls r3, r1, #9 + 8001736: 4621 mov r1, r4 + 8001738: ea43 53d1 orr.w r3, r3, r1, lsr #23 + 800173c: 4621 mov r1, r4 + 800173e: 024a lsls r2, r1, #9 + 8001740: 4610 mov r0, r2 + 8001742: 4619 mov r1, r3 + 8001744: 6c7b ldr r3, [r7, #68] ; 0x44 + 8001746: 2200 movs r2, #0 + 8001748: 62bb str r3, [r7, #40] ; 0x28 + 800174a: 62fa str r2, [r7, #44] ; 0x2c + 800174c: e9d7 230a ldrd r2, r3, [r7, #40] ; 0x28 + 8001750: f7fe fd42 bl 80001d8 <__aeabi_uldivmod> + 8001754: 4602 mov r2, r0 + 8001756: 460b mov r3, r1 + 8001758: 4613 mov r3, r2 + 800175a: 64fb str r3, [r7, #76] ; 0x4c + 800175c: e058 b.n 8001810 } else { /* HSI used as PLL clock source */ pllvco = (uint32_t) ((((uint64_t) HSI_VALUE * ((uint64_t) ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos)))) / (uint64_t)pllm); - 80016a6: 4b38 ldr r3, [pc, #224] ; (8001788 ) - 80016a8: 685b ldr r3, [r3, #4] - 80016aa: 099b lsrs r3, r3, #6 - 80016ac: 2200 movs r2, #0 - 80016ae: 4618 mov r0, r3 - 80016b0: 4611 mov r1, r2 - 80016b2: f3c0 0308 ubfx r3, r0, #0, #9 - 80016b6: 623b str r3, [r7, #32] - 80016b8: 2300 movs r3, #0 - 80016ba: 627b str r3, [r7, #36] ; 0x24 - 80016bc: e9d7 8908 ldrd r8, r9, [r7, #32] - 80016c0: 4642 mov r2, r8 - 80016c2: 464b mov r3, r9 - 80016c4: f04f 0000 mov.w r0, #0 - 80016c8: f04f 0100 mov.w r1, #0 - 80016cc: 0159 lsls r1, r3, #5 - 80016ce: ea41 61d2 orr.w r1, r1, r2, lsr #27 - 80016d2: 0150 lsls r0, r2, #5 - 80016d4: 4602 mov r2, r0 - 80016d6: 460b mov r3, r1 - 80016d8: 4641 mov r1, r8 - 80016da: ebb2 0a01 subs.w sl, r2, r1 - 80016de: 4649 mov r1, r9 - 80016e0: eb63 0b01 sbc.w fp, r3, r1 - 80016e4: f04f 0200 mov.w r2, #0 - 80016e8: f04f 0300 mov.w r3, #0 - 80016ec: ea4f 138b mov.w r3, fp, lsl #6 - 80016f0: ea43 639a orr.w r3, r3, sl, lsr #26 - 80016f4: ea4f 128a mov.w r2, sl, lsl #6 - 80016f8: ebb2 040a subs.w r4, r2, sl - 80016fc: eb63 050b sbc.w r5, r3, fp - 8001700: f04f 0200 mov.w r2, #0 - 8001704: f04f 0300 mov.w r3, #0 - 8001708: 00eb lsls r3, r5, #3 - 800170a: ea43 7354 orr.w r3, r3, r4, lsr #29 - 800170e: 00e2 lsls r2, r4, #3 - 8001710: 4614 mov r4, r2 - 8001712: 461d mov r5, r3 - 8001714: 4643 mov r3, r8 - 8001716: 18e3 adds r3, r4, r3 - 8001718: 603b str r3, [r7, #0] - 800171a: 464b mov r3, r9 - 800171c: eb45 0303 adc.w r3, r5, r3 - 8001720: 607b str r3, [r7, #4] - 8001722: f04f 0200 mov.w r2, #0 - 8001726: f04f 0300 mov.w r3, #0 - 800172a: e9d7 4500 ldrd r4, r5, [r7] - 800172e: 4629 mov r1, r5 - 8001730: 028b lsls r3, r1, #10 - 8001732: 4621 mov r1, r4 - 8001734: ea43 5391 orr.w r3, r3, r1, lsr #22 - 8001738: 4621 mov r1, r4 - 800173a: 028a lsls r2, r1, #10 - 800173c: 4610 mov r0, r2 - 800173e: 4619 mov r1, r3 - 8001740: 6c7b ldr r3, [r7, #68] ; 0x44 - 8001742: 2200 movs r2, #0 - 8001744: 61bb str r3, [r7, #24] - 8001746: 61fa str r2, [r7, #28] - 8001748: e9d7 2306 ldrd r2, r3, [r7, #24] - 800174c: f7fe fd44 bl 80001d8 <__aeabi_uldivmod> - 8001750: 4602 mov r2, r0 - 8001752: 460b mov r3, r1 - 8001754: 4613 mov r3, r2 - 8001756: 64fb str r3, [r7, #76] ; 0x4c + 800175e: 4b38 ldr r3, [pc, #224] ; (8001840 ) + 8001760: 685b ldr r3, [r3, #4] + 8001762: 099b lsrs r3, r3, #6 + 8001764: 2200 movs r2, #0 + 8001766: 4618 mov r0, r3 + 8001768: 4611 mov r1, r2 + 800176a: f3c0 0308 ubfx r3, r0, #0, #9 + 800176e: 623b str r3, [r7, #32] + 8001770: 2300 movs r3, #0 + 8001772: 627b str r3, [r7, #36] ; 0x24 + 8001774: e9d7 8908 ldrd r8, r9, [r7, #32] + 8001778: 4642 mov r2, r8 + 800177a: 464b mov r3, r9 + 800177c: f04f 0000 mov.w r0, #0 + 8001780: f04f 0100 mov.w r1, #0 + 8001784: 0159 lsls r1, r3, #5 + 8001786: ea41 61d2 orr.w r1, r1, r2, lsr #27 + 800178a: 0150 lsls r0, r2, #5 + 800178c: 4602 mov r2, r0 + 800178e: 460b mov r3, r1 + 8001790: 4641 mov r1, r8 + 8001792: ebb2 0a01 subs.w sl, r2, r1 + 8001796: 4649 mov r1, r9 + 8001798: eb63 0b01 sbc.w fp, r3, r1 + 800179c: f04f 0200 mov.w r2, #0 + 80017a0: f04f 0300 mov.w r3, #0 + 80017a4: ea4f 138b mov.w r3, fp, lsl #6 + 80017a8: ea43 639a orr.w r3, r3, sl, lsr #26 + 80017ac: ea4f 128a mov.w r2, sl, lsl #6 + 80017b0: ebb2 040a subs.w r4, r2, sl + 80017b4: eb63 050b sbc.w r5, r3, fp + 80017b8: f04f 0200 mov.w r2, #0 + 80017bc: f04f 0300 mov.w r3, #0 + 80017c0: 00eb lsls r3, r5, #3 + 80017c2: ea43 7354 orr.w r3, r3, r4, lsr #29 + 80017c6: 00e2 lsls r2, r4, #3 + 80017c8: 4614 mov r4, r2 + 80017ca: 461d mov r5, r3 + 80017cc: 4643 mov r3, r8 + 80017ce: 18e3 adds r3, r4, r3 + 80017d0: 603b str r3, [r7, #0] + 80017d2: 464b mov r3, r9 + 80017d4: eb45 0303 adc.w r3, r5, r3 + 80017d8: 607b str r3, [r7, #4] + 80017da: f04f 0200 mov.w r2, #0 + 80017de: f04f 0300 mov.w r3, #0 + 80017e2: e9d7 4500 ldrd r4, r5, [r7] + 80017e6: 4629 mov r1, r5 + 80017e8: 028b lsls r3, r1, #10 + 80017ea: 4621 mov r1, r4 + 80017ec: ea43 5391 orr.w r3, r3, r1, lsr #22 + 80017f0: 4621 mov r1, r4 + 80017f2: 028a lsls r2, r1, #10 + 80017f4: 4610 mov r0, r2 + 80017f6: 4619 mov r1, r3 + 80017f8: 6c7b ldr r3, [r7, #68] ; 0x44 + 80017fa: 2200 movs r2, #0 + 80017fc: 61bb str r3, [r7, #24] + 80017fe: 61fa str r2, [r7, #28] + 8001800: e9d7 2306 ldrd r2, r3, [r7, #24] + 8001804: f7fe fce8 bl 80001d8 <__aeabi_uldivmod> + 8001808: 4602 mov r2, r0 + 800180a: 460b mov r3, r1 + 800180c: 4613 mov r3, r2 + 800180e: 64fb str r3, [r7, #76] ; 0x4c } pllp = ((((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >> RCC_PLLCFGR_PLLP_Pos) + 1U) *2U); - 8001758: 4b0b ldr r3, [pc, #44] ; (8001788 ) - 800175a: 685b ldr r3, [r3, #4] - 800175c: 0c1b lsrs r3, r3, #16 - 800175e: f003 0303 and.w r3, r3, #3 - 8001762: 3301 adds r3, #1 - 8001764: 005b lsls r3, r3, #1 - 8001766: 643b str r3, [r7, #64] ; 0x40 + 8001810: 4b0b ldr r3, [pc, #44] ; (8001840 ) + 8001812: 685b ldr r3, [r3, #4] + 8001814: 0c1b lsrs r3, r3, #16 + 8001816: f003 0303 and.w r3, r3, #3 + 800181a: 3301 adds r3, #1 + 800181c: 005b lsls r3, r3, #1 + 800181e: 643b str r3, [r7, #64] ; 0x40 sysclockfreq = pllvco/pllp; - 8001768: 6cfa ldr r2, [r7, #76] ; 0x4c - 800176a: 6c3b ldr r3, [r7, #64] ; 0x40 - 800176c: fbb2 f3f3 udiv r3, r2, r3 - 8001770: 64bb str r3, [r7, #72] ; 0x48 + 8001820: 6cfa ldr r2, [r7, #76] ; 0x4c + 8001822: 6c3b ldr r3, [r7, #64] ; 0x40 + 8001824: fbb2 f3f3 udiv r3, r2, r3 + 8001828: 64bb str r3, [r7, #72] ; 0x48 break; - 8001772: e002 b.n 800177a + 800182a: e002 b.n 8001832 } default: { sysclockfreq = HSI_VALUE; - 8001774: 4b05 ldr r3, [pc, #20] ; (800178c ) - 8001776: 64bb str r3, [r7, #72] ; 0x48 + 800182c: 4b05 ldr r3, [pc, #20] ; (8001844 ) + 800182e: 64bb str r3, [r7, #72] ; 0x48 break; - 8001778: bf00 nop + 8001830: bf00 nop } } return sysclockfreq; - 800177a: 6cbb ldr r3, [r7, #72] ; 0x48 + 8001832: 6cbb ldr r3, [r7, #72] ; 0x48 } - 800177c: 4618 mov r0, r3 - 800177e: 3750 adds r7, #80 ; 0x50 - 8001780: 46bd mov sp, r7 - 8001782: e8bd 8fb0 ldmia.w sp!, {r4, r5, r7, r8, r9, sl, fp, pc} - 8001786: bf00 nop - 8001788: 40023800 .word 0x40023800 - 800178c: 00f42400 .word 0x00f42400 - 8001790: 007a1200 .word 0x007a1200 + 8001834: 4618 mov r0, r3 + 8001836: 3750 adds r7, #80 ; 0x50 + 8001838: 46bd mov sp, r7 + 800183a: e8bd 8fb0 ldmia.w sp!, {r4, r5, r7, r8, r9, sl, fp, pc} + 800183e: bf00 nop + 8001840: 40023800 .word 0x40023800 + 8001844: 00f42400 .word 0x00f42400 + 8001848: 007a1200 .word 0x007a1200 -08001794 : +0800184c : * @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency * and updated within this function * @retval HCLK frequency */ uint32_t HAL_RCC_GetHCLKFreq(void) { - 8001794: b480 push {r7} - 8001796: af00 add r7, sp, #0 + 800184c: b480 push {r7} + 800184e: af00 add r7, sp, #0 return SystemCoreClock; - 8001798: 4b03 ldr r3, [pc, #12] ; (80017a8 ) - 800179a: 681b ldr r3, [r3, #0] + 8001850: 4b03 ldr r3, [pc, #12] ; (8001860 ) + 8001852: 681b ldr r3, [r3, #0] } - 800179c: 4618 mov r0, r3 - 800179e: 46bd mov sp, r7 - 80017a0: f85d 7b04 ldr.w r7, [sp], #4 - 80017a4: 4770 bx lr - 80017a6: bf00 nop - 80017a8: 20000000 .word 0x20000000 + 8001854: 4618 mov r0, r3 + 8001856: 46bd mov sp, r7 + 8001858: f85d 7b04 ldr.w r7, [sp], #4 + 800185c: 4770 bx lr + 800185e: bf00 nop + 8001860: 20000000 .word 0x20000000 -080017ac : +08001864 : * @note Each time PCLK1 changes, this function must be called to update the * right PCLK1 value. Otherwise, any configuration based on this function will be incorrect. * @retval PCLK1 frequency */ uint32_t HAL_RCC_GetPCLK1Freq(void) { - 80017ac: b580 push {r7, lr} - 80017ae: af00 add r7, sp, #0 + 8001864: b580 push {r7, lr} + 8001866: af00 add r7, sp, #0 /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/ return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1)>> RCC_CFGR_PPRE1_Pos]); - 80017b0: f7ff fff0 bl 8001794 - 80017b4: 4602 mov r2, r0 - 80017b6: 4b05 ldr r3, [pc, #20] ; (80017cc ) - 80017b8: 689b ldr r3, [r3, #8] - 80017ba: 0a9b lsrs r3, r3, #10 - 80017bc: f003 0307 and.w r3, r3, #7 - 80017c0: 4903 ldr r1, [pc, #12] ; (80017d0 ) - 80017c2: 5ccb ldrb r3, [r1, r3] - 80017c4: fa22 f303 lsr.w r3, r2, r3 + 8001868: f7ff fff0 bl 800184c + 800186c: 4602 mov r2, r0 + 800186e: 4b05 ldr r3, [pc, #20] ; (8001884 ) + 8001870: 689b ldr r3, [r3, #8] + 8001872: 0a9b lsrs r3, r3, #10 + 8001874: f003 0307 and.w r3, r3, #7 + 8001878: 4903 ldr r1, [pc, #12] ; (8001888 ) + 800187a: 5ccb ldrb r3, [r1, r3] + 800187c: fa22 f303 lsr.w r3, r2, r3 } - 80017c8: 4618 mov r0, r3 - 80017ca: bd80 pop {r7, pc} - 80017cc: 40023800 .word 0x40023800 - 80017d0: 08002008 .word 0x08002008 + 8001880: 4618 mov r0, r3 + 8001882: bd80 pop {r7, pc} + 8001884: 40023800 .word 0x40023800 + 8001888: 080021fc .word 0x080021fc -080017d4 : +0800188c : * @note Each time PCLK2 changes, this function must be called to update the * right PCLK2 value. Otherwise, any configuration based on this function will be incorrect. * @retval PCLK2 frequency */ uint32_t HAL_RCC_GetPCLK2Freq(void) { - 80017d4: b580 push {r7, lr} - 80017d6: af00 add r7, sp, #0 + 800188c: b580 push {r7, lr} + 800188e: af00 add r7, sp, #0 /* Get HCLK source and Compute PCLK2 frequency ---------------------------*/ return (HAL_RCC_GetHCLKFreq()>> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2)>> RCC_CFGR_PPRE2_Pos]); - 80017d8: f7ff ffdc bl 8001794 - 80017dc: 4602 mov r2, r0 - 80017de: 4b05 ldr r3, [pc, #20] ; (80017f4 ) - 80017e0: 689b ldr r3, [r3, #8] - 80017e2: 0b5b lsrs r3, r3, #13 - 80017e4: f003 0307 and.w r3, r3, #7 - 80017e8: 4903 ldr r1, [pc, #12] ; (80017f8 ) - 80017ea: 5ccb ldrb r3, [r1, r3] - 80017ec: fa22 f303 lsr.w r3, r2, r3 + 8001890: f7ff ffdc bl 800184c + 8001894: 4602 mov r2, r0 + 8001896: 4b05 ldr r3, [pc, #20] ; (80018ac ) + 8001898: 689b ldr r3, [r3, #8] + 800189a: 0b5b lsrs r3, r3, #13 + 800189c: f003 0307 and.w r3, r3, #7 + 80018a0: 4903 ldr r1, [pc, #12] ; (80018b0 ) + 80018a2: 5ccb ldrb r3, [r1, r3] + 80018a4: fa22 f303 lsr.w r3, r2, r3 } - 80017f0: 4618 mov r0, r3 - 80017f2: bd80 pop {r7, pc} - 80017f4: 40023800 .word 0x40023800 - 80017f8: 08002008 .word 0x08002008 + 80018a8: 4618 mov r0, r3 + 80018aa: bd80 pop {r7, pc} + 80018ac: 40023800 .word 0x40023800 + 80018b0: 080021fc .word 0x080021fc -080017fc : +080018b4 : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval HAL status */ HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart) { - 80017fc: b580 push {r7, lr} - 80017fe: b082 sub sp, #8 - 8001800: af00 add r7, sp, #0 - 8001802: 6078 str r0, [r7, #4] + 80018b4: b580 push {r7, lr} + 80018b6: b082 sub sp, #8 + 80018b8: af00 add r7, sp, #0 + 80018ba: 6078 str r0, [r7, #4] /* Check the UART handle allocation */ if (huart == NULL) - 8001804: 687b ldr r3, [r7, #4] - 8001806: 2b00 cmp r3, #0 - 8001808: d101 bne.n 800180e + 80018bc: 687b ldr r3, [r7, #4] + 80018be: 2b00 cmp r3, #0 + 80018c0: d101 bne.n 80018c6 { return HAL_ERROR; - 800180a: 2301 movs r3, #1 - 800180c: e03f b.n 800188e + 80018c2: 2301 movs r3, #1 + 80018c4: e03f b.n 8001946 assert_param(IS_UART_INSTANCE(huart->Instance)); } assert_param(IS_UART_WORD_LENGTH(huart->Init.WordLength)); assert_param(IS_UART_OVERSAMPLING(huart->Init.OverSampling)); if (huart->gState == HAL_UART_STATE_RESET) - 800180e: 687b ldr r3, [r7, #4] - 8001810: f893 303d ldrb.w r3, [r3, #61] ; 0x3d - 8001814: b2db uxtb r3, r3 - 8001816: 2b00 cmp r3, #0 - 8001818: d106 bne.n 8001828 + 80018c6: 687b ldr r3, [r7, #4] + 80018c8: f893 303d ldrb.w r3, [r3, #61] ; 0x3d + 80018cc: b2db uxtb r3, r3 + 80018ce: 2b00 cmp r3, #0 + 80018d0: d106 bne.n 80018e0 { /* Allocate lock resource and initialize it */ huart->Lock = HAL_UNLOCKED; - 800181a: 687b ldr r3, [r7, #4] - 800181c: 2200 movs r2, #0 - 800181e: f883 203c strb.w r2, [r3, #60] ; 0x3c + 80018d2: 687b ldr r3, [r7, #4] + 80018d4: 2200 movs r2, #0 + 80018d6: f883 203c strb.w r2, [r3, #60] ; 0x3c /* Init the low level hardware */ huart->MspInitCallback(huart); #else /* Init the low level hardware : GPIO, CLOCK */ HAL_UART_MspInit(huart); - 8001822: 6878 ldr r0, [r7, #4] - 8001824: f7fe ffae bl 8000784 + 80018da: 6878 ldr r0, [r7, #4] + 80018dc: f7fe ff96 bl 800080c #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ } huart->gState = HAL_UART_STATE_BUSY; - 8001828: 687b ldr r3, [r7, #4] - 800182a: 2224 movs r2, #36 ; 0x24 - 800182c: f883 203d strb.w r2, [r3, #61] ; 0x3d + 80018e0: 687b ldr r3, [r7, #4] + 80018e2: 2224 movs r2, #36 ; 0x24 + 80018e4: f883 203d strb.w r2, [r3, #61] ; 0x3d /* Disable the peripheral */ __HAL_UART_DISABLE(huart); - 8001830: 687b ldr r3, [r7, #4] - 8001832: 681b ldr r3, [r3, #0] - 8001834: 68da ldr r2, [r3, #12] - 8001836: 687b ldr r3, [r7, #4] - 8001838: 681b ldr r3, [r3, #0] - 800183a: f422 5200 bic.w r2, r2, #8192 ; 0x2000 - 800183e: 60da str r2, [r3, #12] + 80018e8: 687b ldr r3, [r7, #4] + 80018ea: 681b ldr r3, [r3, #0] + 80018ec: 68da ldr r2, [r3, #12] + 80018ee: 687b ldr r3, [r7, #4] + 80018f0: 681b ldr r3, [r3, #0] + 80018f2: f422 5200 bic.w r2, r2, #8192 ; 0x2000 + 80018f6: 60da str r2, [r3, #12] /* Set the UART Communication parameters */ UART_SetConfig(huart); - 8001840: 6878 ldr r0, [r7, #4] - 8001842: f000 f929 bl 8001a98 + 80018f8: 6878 ldr r0, [r7, #4] + 80018fa: f000 f9cb bl 8001c94 /* In asynchronous mode, the following bits must be kept cleared: - LINEN and CLKEN bits in the USART_CR2 register, - SCEN, HDSEL and IREN bits in the USART_CR3 register.*/ CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); - 8001846: 687b ldr r3, [r7, #4] - 8001848: 681b ldr r3, [r3, #0] - 800184a: 691a ldr r2, [r3, #16] - 800184c: 687b ldr r3, [r7, #4] - 800184e: 681b ldr r3, [r3, #0] - 8001850: f422 4290 bic.w r2, r2, #18432 ; 0x4800 - 8001854: 611a str r2, [r3, #16] + 80018fe: 687b ldr r3, [r7, #4] + 8001900: 681b ldr r3, [r3, #0] + 8001902: 691a ldr r2, [r3, #16] + 8001904: 687b ldr r3, [r7, #4] + 8001906: 681b ldr r3, [r3, #0] + 8001908: f422 4290 bic.w r2, r2, #18432 ; 0x4800 + 800190c: 611a str r2, [r3, #16] CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); - 8001856: 687b ldr r3, [r7, #4] - 8001858: 681b ldr r3, [r3, #0] - 800185a: 695a ldr r2, [r3, #20] - 800185c: 687b ldr r3, [r7, #4] - 800185e: 681b ldr r3, [r3, #0] - 8001860: f022 022a bic.w r2, r2, #42 ; 0x2a - 8001864: 615a str r2, [r3, #20] + 800190e: 687b ldr r3, [r7, #4] + 8001910: 681b ldr r3, [r3, #0] + 8001912: 695a ldr r2, [r3, #20] + 8001914: 687b ldr r3, [r7, #4] + 8001916: 681b ldr r3, [r3, #0] + 8001918: f022 022a bic.w r2, r2, #42 ; 0x2a + 800191c: 615a str r2, [r3, #20] /* Enable the peripheral */ __HAL_UART_ENABLE(huart); - 8001866: 687b ldr r3, [r7, #4] - 8001868: 681b ldr r3, [r3, #0] - 800186a: 68da ldr r2, [r3, #12] - 800186c: 687b ldr r3, [r7, #4] - 800186e: 681b ldr r3, [r3, #0] - 8001870: f442 5200 orr.w r2, r2, #8192 ; 0x2000 - 8001874: 60da str r2, [r3, #12] + 800191e: 687b ldr r3, [r7, #4] + 8001920: 681b ldr r3, [r3, #0] + 8001922: 68da ldr r2, [r3, #12] + 8001924: 687b ldr r3, [r7, #4] + 8001926: 681b ldr r3, [r3, #0] + 8001928: f442 5200 orr.w r2, r2, #8192 ; 0x2000 + 800192c: 60da str r2, [r3, #12] /* Initialize the UART state */ huart->ErrorCode = HAL_UART_ERROR_NONE; - 8001876: 687b ldr r3, [r7, #4] - 8001878: 2200 movs r2, #0 - 800187a: 641a str r2, [r3, #64] ; 0x40 + 800192e: 687b ldr r3, [r7, #4] + 8001930: 2200 movs r2, #0 + 8001932: 641a str r2, [r3, #64] ; 0x40 huart->gState = HAL_UART_STATE_READY; - 800187c: 687b ldr r3, [r7, #4] - 800187e: 2220 movs r2, #32 - 8001880: f883 203d strb.w r2, [r3, #61] ; 0x3d + 8001934: 687b ldr r3, [r7, #4] + 8001936: 2220 movs r2, #32 + 8001938: f883 203d strb.w r2, [r3, #61] ; 0x3d huart->RxState = HAL_UART_STATE_READY; - 8001884: 687b ldr r3, [r7, #4] - 8001886: 2220 movs r2, #32 - 8001888: f883 203e strb.w r2, [r3, #62] ; 0x3e + 800193c: 687b ldr r3, [r7, #4] + 800193e: 2220 movs r2, #32 + 8001940: f883 203e strb.w r2, [r3, #62] ; 0x3e return HAL_OK; - 800188c: 2300 movs r3, #0 + 8001944: 2300 movs r3, #0 } - 800188e: 4618 mov r0, r3 - 8001890: 3708 adds r7, #8 - 8001892: 46bd mov sp, r7 - 8001894: bd80 pop {r7, pc} + 8001946: 4618 mov r0, r3 + 8001948: 3708 adds r7, #8 + 800194a: 46bd mov sp, r7 + 800194c: bd80 pop {r7, pc} -08001896 : +0800194e : * @param Size Amount of data elements (u8 or u16) to be sent * @param Timeout Timeout duration * @retval HAL status */ HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size, uint32_t Timeout) { - 8001896: b580 push {r7, lr} - 8001898: b08a sub sp, #40 ; 0x28 - 800189a: af02 add r7, sp, #8 - 800189c: 60f8 str r0, [r7, #12] - 800189e: 60b9 str r1, [r7, #8] - 80018a0: 603b str r3, [r7, #0] - 80018a2: 4613 mov r3, r2 - 80018a4: 80fb strh r3, [r7, #6] + 800194e: b580 push {r7, lr} + 8001950: b08a sub sp, #40 ; 0x28 + 8001952: af02 add r7, sp, #8 + 8001954: 60f8 str r0, [r7, #12] + 8001956: 60b9 str r1, [r7, #8] + 8001958: 603b str r3, [r7, #0] + 800195a: 4613 mov r3, r2 + 800195c: 80fb strh r3, [r7, #6] const uint8_t *pdata8bits; const uint16_t *pdata16bits; uint32_t tickstart = 0U; - 80018a6: 2300 movs r3, #0 - 80018a8: 617b str r3, [r7, #20] + 800195e: 2300 movs r3, #0 + 8001960: 617b str r3, [r7, #20] /* Check that a Tx process is not already ongoing */ if (huart->gState == HAL_UART_STATE_READY) - 80018aa: 68fb ldr r3, [r7, #12] - 80018ac: f893 303d ldrb.w r3, [r3, #61] ; 0x3d - 80018b0: b2db uxtb r3, r3 - 80018b2: 2b20 cmp r3, #32 - 80018b4: d17c bne.n 80019b0 + 8001962: 68fb ldr r3, [r7, #12] + 8001964: f893 303d ldrb.w r3, [r3, #61] ; 0x3d + 8001968: b2db uxtb r3, r3 + 800196a: 2b20 cmp r3, #32 + 800196c: d17c bne.n 8001a68 { if ((pData == NULL) || (Size == 0U)) - 80018b6: 68bb ldr r3, [r7, #8] - 80018b8: 2b00 cmp r3, #0 - 80018ba: d002 beq.n 80018c2 - 80018bc: 88fb ldrh r3, [r7, #6] - 80018be: 2b00 cmp r3, #0 - 80018c0: d101 bne.n 80018c6 + 800196e: 68bb ldr r3, [r7, #8] + 8001970: 2b00 cmp r3, #0 + 8001972: d002 beq.n 800197a + 8001974: 88fb ldrh r3, [r7, #6] + 8001976: 2b00 cmp r3, #0 + 8001978: d101 bne.n 800197e { return HAL_ERROR; - 80018c2: 2301 movs r3, #1 - 80018c4: e075 b.n 80019b2 + 800197a: 2301 movs r3, #1 + 800197c: e075 b.n 8001a6a } /* Process Locked */ __HAL_LOCK(huart); - 80018c6: 68fb ldr r3, [r7, #12] - 80018c8: f893 303c ldrb.w r3, [r3, #60] ; 0x3c - 80018cc: 2b01 cmp r3, #1 - 80018ce: d101 bne.n 80018d4 - 80018d0: 2302 movs r3, #2 - 80018d2: e06e b.n 80019b2 - 80018d4: 68fb ldr r3, [r7, #12] - 80018d6: 2201 movs r2, #1 - 80018d8: f883 203c strb.w r2, [r3, #60] ; 0x3c + 800197e: 68fb ldr r3, [r7, #12] + 8001980: f893 303c ldrb.w r3, [r3, #60] ; 0x3c + 8001984: 2b01 cmp r3, #1 + 8001986: d101 bne.n 800198c + 8001988: 2302 movs r3, #2 + 800198a: e06e b.n 8001a6a + 800198c: 68fb ldr r3, [r7, #12] + 800198e: 2201 movs r2, #1 + 8001990: f883 203c strb.w r2, [r3, #60] ; 0x3c huart->ErrorCode = HAL_UART_ERROR_NONE; - 80018dc: 68fb ldr r3, [r7, #12] - 80018de: 2200 movs r2, #0 - 80018e0: 641a str r2, [r3, #64] ; 0x40 + 8001994: 68fb ldr r3, [r7, #12] + 8001996: 2200 movs r2, #0 + 8001998: 641a str r2, [r3, #64] ; 0x40 huart->gState = HAL_UART_STATE_BUSY_TX; - 80018e2: 68fb ldr r3, [r7, #12] - 80018e4: 2221 movs r2, #33 ; 0x21 - 80018e6: f883 203d strb.w r2, [r3, #61] ; 0x3d + 800199a: 68fb ldr r3, [r7, #12] + 800199c: 2221 movs r2, #33 ; 0x21 + 800199e: f883 203d strb.w r2, [r3, #61] ; 0x3d /* Init tickstart for timeout management */ tickstart = HAL_GetTick(); - 80018ea: f7ff f85f bl 80009ac - 80018ee: 6178 str r0, [r7, #20] + 80019a2: f7ff f847 bl 8000a34 + 80019a6: 6178 str r0, [r7, #20] huart->TxXferSize = Size; - 80018f0: 68fb ldr r3, [r7, #12] - 80018f2: 88fa ldrh r2, [r7, #6] - 80018f4: 849a strh r2, [r3, #36] ; 0x24 + 80019a8: 68fb ldr r3, [r7, #12] + 80019aa: 88fa ldrh r2, [r7, #6] + 80019ac: 849a strh r2, [r3, #36] ; 0x24 huart->TxXferCount = Size; - 80018f6: 68fb ldr r3, [r7, #12] - 80018f8: 88fa ldrh r2, [r7, #6] - 80018fa: 84da strh r2, [r3, #38] ; 0x26 + 80019ae: 68fb ldr r3, [r7, #12] + 80019b0: 88fa ldrh r2, [r7, #6] + 80019b2: 84da strh r2, [r3, #38] ; 0x26 /* In case of 9bits/No Parity transfer, pData needs to be handled as a uint16_t pointer */ if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) - 80018fc: 68fb ldr r3, [r7, #12] - 80018fe: 689b ldr r3, [r3, #8] - 8001900: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 - 8001904: d108 bne.n 8001918 - 8001906: 68fb ldr r3, [r7, #12] - 8001908: 691b ldr r3, [r3, #16] - 800190a: 2b00 cmp r3, #0 - 800190c: d104 bne.n 8001918 + 80019b4: 68fb ldr r3, [r7, #12] + 80019b6: 689b ldr r3, [r3, #8] + 80019b8: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 + 80019bc: d108 bne.n 80019d0 + 80019be: 68fb ldr r3, [r7, #12] + 80019c0: 691b ldr r3, [r3, #16] + 80019c2: 2b00 cmp r3, #0 + 80019c4: d104 bne.n 80019d0 { pdata8bits = NULL; - 800190e: 2300 movs r3, #0 - 8001910: 61fb str r3, [r7, #28] + 80019c6: 2300 movs r3, #0 + 80019c8: 61fb str r3, [r7, #28] pdata16bits = (const uint16_t *) pData; - 8001912: 68bb ldr r3, [r7, #8] - 8001914: 61bb str r3, [r7, #24] - 8001916: e003 b.n 8001920 + 80019ca: 68bb ldr r3, [r7, #8] + 80019cc: 61bb str r3, [r7, #24] + 80019ce: e003 b.n 80019d8 } else { pdata8bits = pData; - 8001918: 68bb ldr r3, [r7, #8] - 800191a: 61fb str r3, [r7, #28] + 80019d0: 68bb ldr r3, [r7, #8] + 80019d2: 61fb str r3, [r7, #28] pdata16bits = NULL; - 800191c: 2300 movs r3, #0 - 800191e: 61bb str r3, [r7, #24] + 80019d4: 2300 movs r3, #0 + 80019d6: 61bb str r3, [r7, #24] } /* Process Unlocked */ __HAL_UNLOCK(huart); - 8001920: 68fb ldr r3, [r7, #12] - 8001922: 2200 movs r2, #0 - 8001924: f883 203c strb.w r2, [r3, #60] ; 0x3c + 80019d8: 68fb ldr r3, [r7, #12] + 80019da: 2200 movs r2, #0 + 80019dc: f883 203c strb.w r2, [r3, #60] ; 0x3c while (huart->TxXferCount > 0U) - 8001928: e02a b.n 8001980 + 80019e0: e02a b.n 8001a38 { if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) - 800192a: 683b ldr r3, [r7, #0] - 800192c: 9300 str r3, [sp, #0] - 800192e: 697b ldr r3, [r7, #20] - 8001930: 2200 movs r2, #0 - 8001932: 2180 movs r1, #128 ; 0x80 - 8001934: 68f8 ldr r0, [r7, #12] - 8001936: f000 f840 bl 80019ba - 800193a: 4603 mov r3, r0 - 800193c: 2b00 cmp r3, #0 - 800193e: d001 beq.n 8001944 + 80019e2: 683b ldr r3, [r7, #0] + 80019e4: 9300 str r3, [sp, #0] + 80019e6: 697b ldr r3, [r7, #20] + 80019e8: 2200 movs r2, #0 + 80019ea: 2180 movs r1, #128 ; 0x80 + 80019ec: 68f8 ldr r0, [r7, #12] + 80019ee: f000 f8e2 bl 8001bb6 + 80019f2: 4603 mov r3, r0 + 80019f4: 2b00 cmp r3, #0 + 80019f6: d001 beq.n 80019fc { return HAL_TIMEOUT; - 8001940: 2303 movs r3, #3 - 8001942: e036 b.n 80019b2 + 80019f8: 2303 movs r3, #3 + 80019fa: e036 b.n 8001a6a } if (pdata8bits == NULL) - 8001944: 69fb ldr r3, [r7, #28] - 8001946: 2b00 cmp r3, #0 - 8001948: d10b bne.n 8001962 + 80019fc: 69fb ldr r3, [r7, #28] + 80019fe: 2b00 cmp r3, #0 + 8001a00: d10b bne.n 8001a1a { huart->Instance->DR = (uint16_t)(*pdata16bits & 0x01FFU); - 800194a: 69bb ldr r3, [r7, #24] - 800194c: 881b ldrh r3, [r3, #0] - 800194e: 461a mov r2, r3 - 8001950: 68fb ldr r3, [r7, #12] - 8001952: 681b ldr r3, [r3, #0] - 8001954: f3c2 0208 ubfx r2, r2, #0, #9 - 8001958: 605a str r2, [r3, #4] + 8001a02: 69bb ldr r3, [r7, #24] + 8001a04: 881b ldrh r3, [r3, #0] + 8001a06: 461a mov r2, r3 + 8001a08: 68fb ldr r3, [r7, #12] + 8001a0a: 681b ldr r3, [r3, #0] + 8001a0c: f3c2 0208 ubfx r2, r2, #0, #9 + 8001a10: 605a str r2, [r3, #4] pdata16bits++; - 800195a: 69bb ldr r3, [r7, #24] - 800195c: 3302 adds r3, #2 - 800195e: 61bb str r3, [r7, #24] - 8001960: e007 b.n 8001972 + 8001a12: 69bb ldr r3, [r7, #24] + 8001a14: 3302 adds r3, #2 + 8001a16: 61bb str r3, [r7, #24] + 8001a18: e007 b.n 8001a2a } else { huart->Instance->DR = (uint8_t)(*pdata8bits & 0xFFU); - 8001962: 69fb ldr r3, [r7, #28] - 8001964: 781a ldrb r2, [r3, #0] - 8001966: 68fb ldr r3, [r7, #12] - 8001968: 681b ldr r3, [r3, #0] - 800196a: 605a str r2, [r3, #4] + 8001a1a: 69fb ldr r3, [r7, #28] + 8001a1c: 781a ldrb r2, [r3, #0] + 8001a1e: 68fb ldr r3, [r7, #12] + 8001a20: 681b ldr r3, [r3, #0] + 8001a22: 605a str r2, [r3, #4] pdata8bits++; - 800196c: 69fb ldr r3, [r7, #28] - 800196e: 3301 adds r3, #1 - 8001970: 61fb str r3, [r7, #28] + 8001a24: 69fb ldr r3, [r7, #28] + 8001a26: 3301 adds r3, #1 + 8001a28: 61fb str r3, [r7, #28] } huart->TxXferCount--; - 8001972: 68fb ldr r3, [r7, #12] - 8001974: 8cdb ldrh r3, [r3, #38] ; 0x26 - 8001976: b29b uxth r3, r3 - 8001978: 3b01 subs r3, #1 - 800197a: b29a uxth r2, r3 - 800197c: 68fb ldr r3, [r7, #12] - 800197e: 84da strh r2, [r3, #38] ; 0x26 + 8001a2a: 68fb ldr r3, [r7, #12] + 8001a2c: 8cdb ldrh r3, [r3, #38] ; 0x26 + 8001a2e: b29b uxth r3, r3 + 8001a30: 3b01 subs r3, #1 + 8001a32: b29a uxth r2, r3 + 8001a34: 68fb ldr r3, [r7, #12] + 8001a36: 84da strh r2, [r3, #38] ; 0x26 while (huart->TxXferCount > 0U) - 8001980: 68fb ldr r3, [r7, #12] - 8001982: 8cdb ldrh r3, [r3, #38] ; 0x26 - 8001984: b29b uxth r3, r3 - 8001986: 2b00 cmp r3, #0 - 8001988: d1cf bne.n 800192a + 8001a38: 68fb ldr r3, [r7, #12] + 8001a3a: 8cdb ldrh r3, [r3, #38] ; 0x26 + 8001a3c: b29b uxth r3, r3 + 8001a3e: 2b00 cmp r3, #0 + 8001a40: d1cf bne.n 80019e2 } if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK) - 800198a: 683b ldr r3, [r7, #0] - 800198c: 9300 str r3, [sp, #0] - 800198e: 697b ldr r3, [r7, #20] - 8001990: 2200 movs r2, #0 - 8001992: 2140 movs r1, #64 ; 0x40 - 8001994: 68f8 ldr r0, [r7, #12] - 8001996: f000 f810 bl 80019ba - 800199a: 4603 mov r3, r0 - 800199c: 2b00 cmp r3, #0 - 800199e: d001 beq.n 80019a4 + 8001a42: 683b ldr r3, [r7, #0] + 8001a44: 9300 str r3, [sp, #0] + 8001a46: 697b ldr r3, [r7, #20] + 8001a48: 2200 movs r2, #0 + 8001a4a: 2140 movs r1, #64 ; 0x40 + 8001a4c: 68f8 ldr r0, [r7, #12] + 8001a4e: f000 f8b2 bl 8001bb6 + 8001a52: 4603 mov r3, r0 + 8001a54: 2b00 cmp r3, #0 + 8001a56: d001 beq.n 8001a5c { return HAL_TIMEOUT; - 80019a0: 2303 movs r3, #3 - 80019a2: e006 b.n 80019b2 + 8001a58: 2303 movs r3, #3 + 8001a5a: e006 b.n 8001a6a } /* At end of Tx process, restore huart->gState to Ready */ huart->gState = HAL_UART_STATE_READY; - 80019a4: 68fb ldr r3, [r7, #12] - 80019a6: 2220 movs r2, #32 - 80019a8: f883 203d strb.w r2, [r3, #61] ; 0x3d + 8001a5c: 68fb ldr r3, [r7, #12] + 8001a5e: 2220 movs r2, #32 + 8001a60: f883 203d strb.w r2, [r3, #61] ; 0x3d return HAL_OK; - 80019ac: 2300 movs r3, #0 - 80019ae: e000 b.n 80019b2 + 8001a64: 2300 movs r3, #0 + 8001a66: e000 b.n 8001a6a } else { return HAL_BUSY; - 80019b0: 2302 movs r3, #2 + 8001a68: 2302 movs r3, #2 } } - 80019b2: 4618 mov r0, r3 - 80019b4: 3720 adds r7, #32 - 80019b6: 46bd mov sp, r7 - 80019b8: bd80 pop {r7, pc} + 8001a6a: 4618 mov r0, r3 + 8001a6c: 3720 adds r7, #32 + 8001a6e: 46bd mov sp, r7 + 8001a70: bd80 pop {r7, pc} -080019ba : +08001a72 : + * @param Size Amount of data elements (u8 or u16) to be received. + * @param Timeout Timeout duration + * @retval HAL status + */ +HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout) +{ + 8001a72: b580 push {r7, lr} + 8001a74: b08a sub sp, #40 ; 0x28 + 8001a76: af02 add r7, sp, #8 + 8001a78: 60f8 str r0, [r7, #12] + 8001a7a: 60b9 str r1, [r7, #8] + 8001a7c: 603b str r3, [r7, #0] + 8001a7e: 4613 mov r3, r2 + 8001a80: 80fb strh r3, [r7, #6] + uint8_t *pdata8bits; + uint16_t *pdata16bits; + uint32_t tickstart = 0U; + 8001a82: 2300 movs r3, #0 + 8001a84: 617b str r3, [r7, #20] + + /* Check that a Rx process is not already ongoing */ + if (huart->RxState == HAL_UART_STATE_READY) + 8001a86: 68fb ldr r3, [r7, #12] + 8001a88: f893 303e ldrb.w r3, [r3, #62] ; 0x3e + 8001a8c: b2db uxtb r3, r3 + 8001a8e: 2b20 cmp r3, #32 + 8001a90: f040 808c bne.w 8001bac + { + if ((pData == NULL) || (Size == 0U)) + 8001a94: 68bb ldr r3, [r7, #8] + 8001a96: 2b00 cmp r3, #0 + 8001a98: d002 beq.n 8001aa0 + 8001a9a: 88fb ldrh r3, [r7, #6] + 8001a9c: 2b00 cmp r3, #0 + 8001a9e: d101 bne.n 8001aa4 + { + return HAL_ERROR; + 8001aa0: 2301 movs r3, #1 + 8001aa2: e084 b.n 8001bae + } + + /* Process Locked */ + __HAL_LOCK(huart); + 8001aa4: 68fb ldr r3, [r7, #12] + 8001aa6: f893 303c ldrb.w r3, [r3, #60] ; 0x3c + 8001aaa: 2b01 cmp r3, #1 + 8001aac: d101 bne.n 8001ab2 + 8001aae: 2302 movs r3, #2 + 8001ab0: e07d b.n 8001bae + 8001ab2: 68fb ldr r3, [r7, #12] + 8001ab4: 2201 movs r2, #1 + 8001ab6: f883 203c strb.w r2, [r3, #60] ; 0x3c + + huart->ErrorCode = HAL_UART_ERROR_NONE; + 8001aba: 68fb ldr r3, [r7, #12] + 8001abc: 2200 movs r2, #0 + 8001abe: 641a str r2, [r3, #64] ; 0x40 + huart->RxState = HAL_UART_STATE_BUSY_RX; + 8001ac0: 68fb ldr r3, [r7, #12] + 8001ac2: 2222 movs r2, #34 ; 0x22 + 8001ac4: f883 203e strb.w r2, [r3, #62] ; 0x3e + huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; + 8001ac8: 68fb ldr r3, [r7, #12] + 8001aca: 2200 movs r2, #0 + 8001acc: 631a str r2, [r3, #48] ; 0x30 + + /* Init tickstart for timeout management */ + tickstart = HAL_GetTick(); + 8001ace: f7fe ffb1 bl 8000a34 + 8001ad2: 6178 str r0, [r7, #20] + + huart->RxXferSize = Size; + 8001ad4: 68fb ldr r3, [r7, #12] + 8001ad6: 88fa ldrh r2, [r7, #6] + 8001ad8: 859a strh r2, [r3, #44] ; 0x2c + huart->RxXferCount = Size; + 8001ada: 68fb ldr r3, [r7, #12] + 8001adc: 88fa ldrh r2, [r7, #6] + 8001ade: 85da strh r2, [r3, #46] ; 0x2e + + /* In case of 9bits/No Parity transfer, pRxData needs to be handled as a uint16_t pointer */ + if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) + 8001ae0: 68fb ldr r3, [r7, #12] + 8001ae2: 689b ldr r3, [r3, #8] + 8001ae4: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 + 8001ae8: d108 bne.n 8001afc + 8001aea: 68fb ldr r3, [r7, #12] + 8001aec: 691b ldr r3, [r3, #16] + 8001aee: 2b00 cmp r3, #0 + 8001af0: d104 bne.n 8001afc + { + pdata8bits = NULL; + 8001af2: 2300 movs r3, #0 + 8001af4: 61fb str r3, [r7, #28] + pdata16bits = (uint16_t *) pData; + 8001af6: 68bb ldr r3, [r7, #8] + 8001af8: 61bb str r3, [r7, #24] + 8001afa: e003 b.n 8001b04 + } + else + { + pdata8bits = pData; + 8001afc: 68bb ldr r3, [r7, #8] + 8001afe: 61fb str r3, [r7, #28] + pdata16bits = NULL; + 8001b00: 2300 movs r3, #0 + 8001b02: 61bb str r3, [r7, #24] + } + + /* Process Unlocked */ + __HAL_UNLOCK(huart); + 8001b04: 68fb ldr r3, [r7, #12] + 8001b06: 2200 movs r2, #0 + 8001b08: f883 203c strb.w r2, [r3, #60] ; 0x3c + + /* Check the remain data to be received */ + while (huart->RxXferCount > 0U) + 8001b0c: e043 b.n 8001b96 + { + if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_RXNE, RESET, tickstart, Timeout) != HAL_OK) + 8001b0e: 683b ldr r3, [r7, #0] + 8001b10: 9300 str r3, [sp, #0] + 8001b12: 697b ldr r3, [r7, #20] + 8001b14: 2200 movs r2, #0 + 8001b16: 2120 movs r1, #32 + 8001b18: 68f8 ldr r0, [r7, #12] + 8001b1a: f000 f84c bl 8001bb6 + 8001b1e: 4603 mov r3, r0 + 8001b20: 2b00 cmp r3, #0 + 8001b22: d001 beq.n 8001b28 + { + return HAL_TIMEOUT; + 8001b24: 2303 movs r3, #3 + 8001b26: e042 b.n 8001bae + } + if (pdata8bits == NULL) + 8001b28: 69fb ldr r3, [r7, #28] + 8001b2a: 2b00 cmp r3, #0 + 8001b2c: d10c bne.n 8001b48 + { + *pdata16bits = (uint16_t)(huart->Instance->DR & 0x01FF); + 8001b2e: 68fb ldr r3, [r7, #12] + 8001b30: 681b ldr r3, [r3, #0] + 8001b32: 685b ldr r3, [r3, #4] + 8001b34: b29b uxth r3, r3 + 8001b36: f3c3 0308 ubfx r3, r3, #0, #9 + 8001b3a: b29a uxth r2, r3 + 8001b3c: 69bb ldr r3, [r7, #24] + 8001b3e: 801a strh r2, [r3, #0] + pdata16bits++; + 8001b40: 69bb ldr r3, [r7, #24] + 8001b42: 3302 adds r3, #2 + 8001b44: 61bb str r3, [r7, #24] + 8001b46: e01f b.n 8001b88 + } + else + { + if ((huart->Init.WordLength == UART_WORDLENGTH_9B) || ((huart->Init.WordLength == UART_WORDLENGTH_8B) && (huart->Init.Parity == UART_PARITY_NONE))) + 8001b48: 68fb ldr r3, [r7, #12] + 8001b4a: 689b ldr r3, [r3, #8] + 8001b4c: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 + 8001b50: d007 beq.n 8001b62 + 8001b52: 68fb ldr r3, [r7, #12] + 8001b54: 689b ldr r3, [r3, #8] + 8001b56: 2b00 cmp r3, #0 + 8001b58: d10a bne.n 8001b70 + 8001b5a: 68fb ldr r3, [r7, #12] + 8001b5c: 691b ldr r3, [r3, #16] + 8001b5e: 2b00 cmp r3, #0 + 8001b60: d106 bne.n 8001b70 + { + *pdata8bits = (uint8_t)(huart->Instance->DR & (uint8_t)0x00FF); + 8001b62: 68fb ldr r3, [r7, #12] + 8001b64: 681b ldr r3, [r3, #0] + 8001b66: 685b ldr r3, [r3, #4] + 8001b68: b2da uxtb r2, r3 + 8001b6a: 69fb ldr r3, [r7, #28] + 8001b6c: 701a strb r2, [r3, #0] + 8001b6e: e008 b.n 8001b82 + } + else + { + *pdata8bits = (uint8_t)(huart->Instance->DR & (uint8_t)0x007F); + 8001b70: 68fb ldr r3, [r7, #12] + 8001b72: 681b ldr r3, [r3, #0] + 8001b74: 685b ldr r3, [r3, #4] + 8001b76: b2db uxtb r3, r3 + 8001b78: f003 037f and.w r3, r3, #127 ; 0x7f + 8001b7c: b2da uxtb r2, r3 + 8001b7e: 69fb ldr r3, [r7, #28] + 8001b80: 701a strb r2, [r3, #0] + } + pdata8bits++; + 8001b82: 69fb ldr r3, [r7, #28] + 8001b84: 3301 adds r3, #1 + 8001b86: 61fb str r3, [r7, #28] + } + huart->RxXferCount--; + 8001b88: 68fb ldr r3, [r7, #12] + 8001b8a: 8ddb ldrh r3, [r3, #46] ; 0x2e + 8001b8c: b29b uxth r3, r3 + 8001b8e: 3b01 subs r3, #1 + 8001b90: b29a uxth r2, r3 + 8001b92: 68fb ldr r3, [r7, #12] + 8001b94: 85da strh r2, [r3, #46] ; 0x2e + while (huart->RxXferCount > 0U) + 8001b96: 68fb ldr r3, [r7, #12] + 8001b98: 8ddb ldrh r3, [r3, #46] ; 0x2e + 8001b9a: b29b uxth r3, r3 + 8001b9c: 2b00 cmp r3, #0 + 8001b9e: d1b6 bne.n 8001b0e + } + + /* At end of Rx process, restore huart->RxState to Ready */ + huart->RxState = HAL_UART_STATE_READY; + 8001ba0: 68fb ldr r3, [r7, #12] + 8001ba2: 2220 movs r2, #32 + 8001ba4: f883 203e strb.w r2, [r3, #62] ; 0x3e + + return HAL_OK; + 8001ba8: 2300 movs r3, #0 + 8001baa: e000 b.n 8001bae + } + else + { + return HAL_BUSY; + 8001bac: 2302 movs r3, #2 + } +} + 8001bae: 4618 mov r0, r3 + 8001bb0: 3720 adds r7, #32 + 8001bb2: 46bd mov sp, r7 + 8001bb4: bd80 pop {r7, pc} + +08001bb6 : * @param Timeout Timeout duration * @retval HAL status */ static HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout) { - 80019ba: b580 push {r7, lr} - 80019bc: b090 sub sp, #64 ; 0x40 - 80019be: af00 add r7, sp, #0 - 80019c0: 60f8 str r0, [r7, #12] - 80019c2: 60b9 str r1, [r7, #8] - 80019c4: 603b str r3, [r7, #0] - 80019c6: 4613 mov r3, r2 - 80019c8: 71fb strb r3, [r7, #7] + 8001bb6: b580 push {r7, lr} + 8001bb8: b090 sub sp, #64 ; 0x40 + 8001bba: af00 add r7, sp, #0 + 8001bbc: 60f8 str r0, [r7, #12] + 8001bbe: 60b9 str r1, [r7, #8] + 8001bc0: 603b str r3, [r7, #0] + 8001bc2: 4613 mov r3, r2 + 8001bc4: 71fb strb r3, [r7, #7] /* Wait until flag is set */ while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status) - 80019ca: e050 b.n 8001a6e + 8001bc6: e050 b.n 8001c6a { /* Check for the Timeout */ if (Timeout != HAL_MAX_DELAY) - 80019cc: 6cbb ldr r3, [r7, #72] ; 0x48 - 80019ce: f1b3 3fff cmp.w r3, #4294967295 - 80019d2: d04c beq.n 8001a6e + 8001bc8: 6cbb ldr r3, [r7, #72] ; 0x48 + 8001bca: f1b3 3fff cmp.w r3, #4294967295 + 8001bce: d04c beq.n 8001c6a { if ((Timeout == 0U) || ((HAL_GetTick() - Tickstart) > Timeout)) - 80019d4: 6cbb ldr r3, [r7, #72] ; 0x48 - 80019d6: 2b00 cmp r3, #0 - 80019d8: d007 beq.n 80019ea - 80019da: f7fe ffe7 bl 80009ac - 80019de: 4602 mov r2, r0 - 80019e0: 683b ldr r3, [r7, #0] - 80019e2: 1ad3 subs r3, r2, r3 - 80019e4: 6cba ldr r2, [r7, #72] ; 0x48 - 80019e6: 429a cmp r2, r3 - 80019e8: d241 bcs.n 8001a6e + 8001bd0: 6cbb ldr r3, [r7, #72] ; 0x48 + 8001bd2: 2b00 cmp r3, #0 + 8001bd4: d007 beq.n 8001be6 + 8001bd6: f7fe ff2d bl 8000a34 + 8001bda: 4602 mov r2, r0 + 8001bdc: 683b ldr r3, [r7, #0] + 8001bde: 1ad3 subs r3, r2, r3 + 8001be0: 6cba ldr r2, [r7, #72] ; 0x48 + 8001be2: 429a cmp r2, r3 + 8001be4: d241 bcs.n 8001c6a { /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE)); - 80019ea: 68fb ldr r3, [r7, #12] - 80019ec: 681b ldr r3, [r3, #0] - 80019ee: 330c adds r3, #12 - 80019f0: 62bb str r3, [r7, #40] ; 0x28 + 8001be6: 68fb ldr r3, [r7, #12] + 8001be8: 681b ldr r3, [r3, #0] + 8001bea: 330c adds r3, #12 + 8001bec: 62bb str r3, [r7, #40] ; 0x28 */ __STATIC_FORCEINLINE uint32_t __LDREXW(volatile uint32_t *addr) { uint32_t result; __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 80019f2: 6abb ldr r3, [r7, #40] ; 0x28 - 80019f4: e853 3f00 ldrex r3, [r3] - 80019f8: 627b str r3, [r7, #36] ; 0x24 + 8001bee: 6abb ldr r3, [r7, #40] ; 0x28 + 8001bf0: e853 3f00 ldrex r3, [r3] + 8001bf4: 627b str r3, [r7, #36] ; 0x24 return(result); - 80019fa: 6a7b ldr r3, [r7, #36] ; 0x24 - 80019fc: f423 73d0 bic.w r3, r3, #416 ; 0x1a0 - 8001a00: 63fb str r3, [r7, #60] ; 0x3c - 8001a02: 68fb ldr r3, [r7, #12] - 8001a04: 681b ldr r3, [r3, #0] - 8001a06: 330c adds r3, #12 - 8001a08: 6bfa ldr r2, [r7, #60] ; 0x3c - 8001a0a: 637a str r2, [r7, #52] ; 0x34 - 8001a0c: 633b str r3, [r7, #48] ; 0x30 + 8001bf6: 6a7b ldr r3, [r7, #36] ; 0x24 + 8001bf8: f423 73d0 bic.w r3, r3, #416 ; 0x1a0 + 8001bfc: 63fb str r3, [r7, #60] ; 0x3c + 8001bfe: 68fb ldr r3, [r7, #12] + 8001c00: 681b ldr r3, [r3, #0] + 8001c02: 330c adds r3, #12 + 8001c04: 6bfa ldr r2, [r7, #60] ; 0x3c + 8001c06: 637a str r2, [r7, #52] ; 0x34 + 8001c08: 633b str r3, [r7, #48] ; 0x30 */ __STATIC_FORCEINLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr) { uint32_t result; __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 8001a0e: 6b39 ldr r1, [r7, #48] ; 0x30 - 8001a10: 6b7a ldr r2, [r7, #52] ; 0x34 - 8001a12: e841 2300 strex r3, r2, [r1] - 8001a16: 62fb str r3, [r7, #44] ; 0x2c + 8001c0a: 6b39 ldr r1, [r7, #48] ; 0x30 + 8001c0c: 6b7a ldr r2, [r7, #52] ; 0x34 + 8001c0e: e841 2300 strex r3, r2, [r1] + 8001c12: 62fb str r3, [r7, #44] ; 0x2c return(result); - 8001a18: 6afb ldr r3, [r7, #44] ; 0x2c - 8001a1a: 2b00 cmp r3, #0 - 8001a1c: d1e5 bne.n 80019ea + 8001c14: 6afb ldr r3, [r7, #44] ; 0x2c + 8001c16: 2b00 cmp r3, #0 + 8001c18: d1e5 bne.n 8001be6 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); - 8001a1e: 68fb ldr r3, [r7, #12] - 8001a20: 681b ldr r3, [r3, #0] - 8001a22: 3314 adds r3, #20 - 8001a24: 617b str r3, [r7, #20] + 8001c1a: 68fb ldr r3, [r7, #12] + 8001c1c: 681b ldr r3, [r3, #0] + 8001c1e: 3314 adds r3, #20 + 8001c20: 617b str r3, [r7, #20] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 8001a26: 697b ldr r3, [r7, #20] - 8001a28: e853 3f00 ldrex r3, [r3] - 8001a2c: 613b str r3, [r7, #16] + 8001c22: 697b ldr r3, [r7, #20] + 8001c24: e853 3f00 ldrex r3, [r3] + 8001c28: 613b str r3, [r7, #16] return(result); - 8001a2e: 693b ldr r3, [r7, #16] - 8001a30: f023 0301 bic.w r3, r3, #1 - 8001a34: 63bb str r3, [r7, #56] ; 0x38 - 8001a36: 68fb ldr r3, [r7, #12] - 8001a38: 681b ldr r3, [r3, #0] - 8001a3a: 3314 adds r3, #20 - 8001a3c: 6bba ldr r2, [r7, #56] ; 0x38 - 8001a3e: 623a str r2, [r7, #32] - 8001a40: 61fb str r3, [r7, #28] + 8001c2a: 693b ldr r3, [r7, #16] + 8001c2c: f023 0301 bic.w r3, r3, #1 + 8001c30: 63bb str r3, [r7, #56] ; 0x38 + 8001c32: 68fb ldr r3, [r7, #12] + 8001c34: 681b ldr r3, [r3, #0] + 8001c36: 3314 adds r3, #20 + 8001c38: 6bba ldr r2, [r7, #56] ; 0x38 + 8001c3a: 623a str r2, [r7, #32] + 8001c3c: 61fb str r3, [r7, #28] __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 8001a42: 69f9 ldr r1, [r7, #28] - 8001a44: 6a3a ldr r2, [r7, #32] - 8001a46: e841 2300 strex r3, r2, [r1] - 8001a4a: 61bb str r3, [r7, #24] + 8001c3e: 69f9 ldr r1, [r7, #28] + 8001c40: 6a3a ldr r2, [r7, #32] + 8001c42: e841 2300 strex r3, r2, [r1] + 8001c46: 61bb str r3, [r7, #24] return(result); - 8001a4c: 69bb ldr r3, [r7, #24] - 8001a4e: 2b00 cmp r3, #0 - 8001a50: d1e5 bne.n 8001a1e + 8001c48: 69bb ldr r3, [r7, #24] + 8001c4a: 2b00 cmp r3, #0 + 8001c4c: d1e5 bne.n 8001c1a huart->gState = HAL_UART_STATE_READY; - 8001a52: 68fb ldr r3, [r7, #12] - 8001a54: 2220 movs r2, #32 - 8001a56: f883 203d strb.w r2, [r3, #61] ; 0x3d + 8001c4e: 68fb ldr r3, [r7, #12] + 8001c50: 2220 movs r2, #32 + 8001c52: f883 203d strb.w r2, [r3, #61] ; 0x3d huart->RxState = HAL_UART_STATE_READY; - 8001a5a: 68fb ldr r3, [r7, #12] - 8001a5c: 2220 movs r2, #32 - 8001a5e: f883 203e strb.w r2, [r3, #62] ; 0x3e + 8001c56: 68fb ldr r3, [r7, #12] + 8001c58: 2220 movs r2, #32 + 8001c5a: f883 203e strb.w r2, [r3, #62] ; 0x3e /* Process Unlocked */ __HAL_UNLOCK(huart); - 8001a62: 68fb ldr r3, [r7, #12] - 8001a64: 2200 movs r2, #0 - 8001a66: f883 203c strb.w r2, [r3, #60] ; 0x3c + 8001c5e: 68fb ldr r3, [r7, #12] + 8001c60: 2200 movs r2, #0 + 8001c62: f883 203c strb.w r2, [r3, #60] ; 0x3c return HAL_TIMEOUT; - 8001a6a: 2303 movs r3, #3 - 8001a6c: e00f b.n 8001a8e + 8001c66: 2303 movs r3, #3 + 8001c68: e00f b.n 8001c8a while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status) - 8001a6e: 68fb ldr r3, [r7, #12] - 8001a70: 681b ldr r3, [r3, #0] - 8001a72: 681a ldr r2, [r3, #0] - 8001a74: 68bb ldr r3, [r7, #8] - 8001a76: 4013 ands r3, r2 - 8001a78: 68ba ldr r2, [r7, #8] - 8001a7a: 429a cmp r2, r3 - 8001a7c: bf0c ite eq - 8001a7e: 2301 moveq r3, #1 - 8001a80: 2300 movne r3, #0 - 8001a82: b2db uxtb r3, r3 - 8001a84: 461a mov r2, r3 - 8001a86: 79fb ldrb r3, [r7, #7] - 8001a88: 429a cmp r2, r3 - 8001a8a: d09f beq.n 80019cc + 8001c6a: 68fb ldr r3, [r7, #12] + 8001c6c: 681b ldr r3, [r3, #0] + 8001c6e: 681a ldr r2, [r3, #0] + 8001c70: 68bb ldr r3, [r7, #8] + 8001c72: 4013 ands r3, r2 + 8001c74: 68ba ldr r2, [r7, #8] + 8001c76: 429a cmp r2, r3 + 8001c78: bf0c ite eq + 8001c7a: 2301 moveq r3, #1 + 8001c7c: 2300 movne r3, #0 + 8001c7e: b2db uxtb r3, r3 + 8001c80: 461a mov r2, r3 + 8001c82: 79fb ldrb r3, [r7, #7] + 8001c84: 429a cmp r2, r3 + 8001c86: d09f beq.n 8001bc8 } } } return HAL_OK; - 8001a8c: 2300 movs r3, #0 + 8001c88: 2300 movs r3, #0 } - 8001a8e: 4618 mov r0, r3 - 8001a90: 3740 adds r7, #64 ; 0x40 - 8001a92: 46bd mov sp, r7 - 8001a94: bd80 pop {r7, pc} + 8001c8a: 4618 mov r0, r3 + 8001c8c: 3740 adds r7, #64 ; 0x40 + 8001c8e: 46bd mov sp, r7 + 8001c90: bd80 pop {r7, pc} ... -08001a98 : +08001c94 : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval None */ static void UART_SetConfig(UART_HandleTypeDef *huart) { - 8001a98: e92d 4fb0 stmdb sp!, {r4, r5, r7, r8, r9, sl, fp, lr} - 8001a9c: b0c0 sub sp, #256 ; 0x100 - 8001a9e: af00 add r7, sp, #0 - 8001aa0: f8c7 00f4 str.w r0, [r7, #244] ; 0xf4 + 8001c94: e92d 4fb0 stmdb sp!, {r4, r5, r7, r8, r9, sl, fp, lr} + 8001c98: b0c0 sub sp, #256 ; 0x100 + 8001c9a: af00 add r7, sp, #0 + 8001c9c: f8c7 00f4 str.w r0, [r7, #244] ; 0xf4 assert_param(IS_UART_MODE(huart->Init.Mode)); /*-------------------------- USART CR2 Configuration -----------------------*/ /* Configure the UART Stop Bits: Set STOP[13:12] bits according to huart->Init.StopBits value */ MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits); - 8001aa4: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4 - 8001aa8: 681b ldr r3, [r3, #0] - 8001aaa: 691b ldr r3, [r3, #16] - 8001aac: f423 5040 bic.w r0, r3, #12288 ; 0x3000 - 8001ab0: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4 - 8001ab4: 68d9 ldr r1, [r3, #12] - 8001ab6: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4 - 8001aba: 681a ldr r2, [r3, #0] - 8001abc: ea40 0301 orr.w r3, r0, r1 - 8001ac0: 6113 str r3, [r2, #16] + 8001ca0: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4 + 8001ca4: 681b ldr r3, [r3, #0] + 8001ca6: 691b ldr r3, [r3, #16] + 8001ca8: f423 5040 bic.w r0, r3, #12288 ; 0x3000 + 8001cac: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4 + 8001cb0: 68d9 ldr r1, [r3, #12] + 8001cb2: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4 + 8001cb6: 681a ldr r2, [r3, #0] + 8001cb8: ea40 0301 orr.w r3, r0, r1 + 8001cbc: 6113 str r3, [r2, #16] Set the M bits according to huart->Init.WordLength value Set PCE and PS bits according to huart->Init.Parity value Set TE and RE bits according to huart->Init.Mode value Set OVER8 bit according to huart->Init.OverSampling value */ tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling; - 8001ac2: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4 - 8001ac6: 689a ldr r2, [r3, #8] - 8001ac8: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4 - 8001acc: 691b ldr r3, [r3, #16] - 8001ace: 431a orrs r2, r3 - 8001ad0: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4 - 8001ad4: 695b ldr r3, [r3, #20] - 8001ad6: 431a orrs r2, r3 - 8001ad8: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4 - 8001adc: 69db ldr r3, [r3, #28] - 8001ade: 4313 orrs r3, r2 - 8001ae0: f8c7 30f8 str.w r3, [r7, #248] ; 0xf8 + 8001cbe: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4 + 8001cc2: 689a ldr r2, [r3, #8] + 8001cc4: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4 + 8001cc8: 691b ldr r3, [r3, #16] + 8001cca: 431a orrs r2, r3 + 8001ccc: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4 + 8001cd0: 695b ldr r3, [r3, #20] + 8001cd2: 431a orrs r2, r3 + 8001cd4: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4 + 8001cd8: 69db ldr r3, [r3, #28] + 8001cda: 4313 orrs r3, r2 + 8001cdc: f8c7 30f8 str.w r3, [r7, #248] ; 0xf8 MODIFY_REG(huart->Instance->CR1, - 8001ae4: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4 - 8001ae8: 681b ldr r3, [r3, #0] - 8001aea: 68db ldr r3, [r3, #12] - 8001aec: f423 4116 bic.w r1, r3, #38400 ; 0x9600 - 8001af0: f021 010c bic.w r1, r1, #12 - 8001af4: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4 - 8001af8: 681a ldr r2, [r3, #0] - 8001afa: f8d7 30f8 ldr.w r3, [r7, #248] ; 0xf8 - 8001afe: 430b orrs r3, r1 - 8001b00: 60d3 str r3, [r2, #12] + 8001ce0: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4 + 8001ce4: 681b ldr r3, [r3, #0] + 8001ce6: 68db ldr r3, [r3, #12] + 8001ce8: f423 4116 bic.w r1, r3, #38400 ; 0x9600 + 8001cec: f021 010c bic.w r1, r1, #12 + 8001cf0: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4 + 8001cf4: 681a ldr r2, [r3, #0] + 8001cf6: f8d7 30f8 ldr.w r3, [r7, #248] ; 0xf8 + 8001cfa: 430b orrs r3, r1 + 8001cfc: 60d3 str r3, [r2, #12] (uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8), tmpreg); /*-------------------------- USART CR3 Configuration -----------------------*/ /* Configure the UART HFC: Set CTSE and RTSE bits according to huart->Init.HwFlowCtl value */ MODIFY_REG(huart->Instance->CR3, (USART_CR3_RTSE | USART_CR3_CTSE), huart->Init.HwFlowCtl); - 8001b02: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4 - 8001b06: 681b ldr r3, [r3, #0] - 8001b08: 695b ldr r3, [r3, #20] - 8001b0a: f423 7040 bic.w r0, r3, #768 ; 0x300 - 8001b0e: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4 - 8001b12: 6999 ldr r1, [r3, #24] - 8001b14: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4 - 8001b18: 681a ldr r2, [r3, #0] - 8001b1a: ea40 0301 orr.w r3, r0, r1 - 8001b1e: 6153 str r3, [r2, #20] + 8001cfe: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4 + 8001d02: 681b ldr r3, [r3, #0] + 8001d04: 695b ldr r3, [r3, #20] + 8001d06: f423 7040 bic.w r0, r3, #768 ; 0x300 + 8001d0a: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4 + 8001d0e: 6999 ldr r1, [r3, #24] + 8001d10: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4 + 8001d14: 681a ldr r2, [r3, #0] + 8001d16: ea40 0301 orr.w r3, r0, r1 + 8001d1a: 6153 str r3, [r2, #20] if ((huart->Instance == USART1) || (huart->Instance == USART6) || (huart->Instance == UART9) || (huart->Instance == UART10)) { pclk = HAL_RCC_GetPCLK2Freq(); } #elif defined(USART6) if ((huart->Instance == USART1) || (huart->Instance == USART6)) - 8001b20: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4 - 8001b24: 681a ldr r2, [r3, #0] - 8001b26: 4b8f ldr r3, [pc, #572] ; (8001d64 ) - 8001b28: 429a cmp r2, r3 - 8001b2a: d005 beq.n 8001b38 - 8001b2c: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4 - 8001b30: 681a ldr r2, [r3, #0] - 8001b32: 4b8d ldr r3, [pc, #564] ; (8001d68 ) - 8001b34: 429a cmp r2, r3 - 8001b36: d104 bne.n 8001b42 + 8001d1c: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4 + 8001d20: 681a ldr r2, [r3, #0] + 8001d22: 4b8f ldr r3, [pc, #572] ; (8001f60 ) + 8001d24: 429a cmp r2, r3 + 8001d26: d005 beq.n 8001d34 + 8001d28: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4 + 8001d2c: 681a ldr r2, [r3, #0] + 8001d2e: 4b8d ldr r3, [pc, #564] ; (8001f64 ) + 8001d30: 429a cmp r2, r3 + 8001d32: d104 bne.n 8001d3e { pclk = HAL_RCC_GetPCLK2Freq(); - 8001b38: f7ff fe4c bl 80017d4 - 8001b3c: f8c7 00fc str.w r0, [r7, #252] ; 0xfc - 8001b40: e003 b.n 8001b4a + 8001d34: f7ff fdaa bl 800188c + 8001d38: f8c7 00fc str.w r0, [r7, #252] ; 0xfc + 8001d3c: e003 b.n 8001d46 pclk = HAL_RCC_GetPCLK2Freq(); } #endif /* USART6 */ else { pclk = HAL_RCC_GetPCLK1Freq(); - 8001b42: f7ff fe33 bl 80017ac - 8001b46: f8c7 00fc str.w r0, [r7, #252] ; 0xfc + 8001d3e: f7ff fd91 bl 8001864 + 8001d42: f8c7 00fc str.w r0, [r7, #252] ; 0xfc } /*-------------------------- USART BRR Configuration ---------------------*/ if (huart->Init.OverSampling == UART_OVERSAMPLING_8) - 8001b4a: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4 - 8001b4e: 69db ldr r3, [r3, #28] - 8001b50: f5b3 4f00 cmp.w r3, #32768 ; 0x8000 - 8001b54: f040 810c bne.w 8001d70 + 8001d46: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4 + 8001d4a: 69db ldr r3, [r3, #28] + 8001d4c: f5b3 4f00 cmp.w r3, #32768 ; 0x8000 + 8001d50: f040 810c bne.w 8001f6c { huart->Instance->BRR = UART_BRR_SAMPLING8(pclk, huart->Init.BaudRate); - 8001b58: f8d7 30fc ldr.w r3, [r7, #252] ; 0xfc - 8001b5c: 2200 movs r2, #0 - 8001b5e: f8c7 30e8 str.w r3, [r7, #232] ; 0xe8 - 8001b62: f8c7 20ec str.w r2, [r7, #236] ; 0xec - 8001b66: e9d7 453a ldrd r4, r5, [r7, #232] ; 0xe8 - 8001b6a: 4622 mov r2, r4 - 8001b6c: 462b mov r3, r5 - 8001b6e: 1891 adds r1, r2, r2 - 8001b70: 65b9 str r1, [r7, #88] ; 0x58 - 8001b72: 415b adcs r3, r3 - 8001b74: 65fb str r3, [r7, #92] ; 0x5c - 8001b76: e9d7 2316 ldrd r2, r3, [r7, #88] ; 0x58 - 8001b7a: 4621 mov r1, r4 - 8001b7c: eb12 0801 adds.w r8, r2, r1 - 8001b80: 4629 mov r1, r5 - 8001b82: eb43 0901 adc.w r9, r3, r1 - 8001b86: f04f 0200 mov.w r2, #0 - 8001b8a: f04f 0300 mov.w r3, #0 - 8001b8e: ea4f 03c9 mov.w r3, r9, lsl #3 - 8001b92: ea43 7358 orr.w r3, r3, r8, lsr #29 - 8001b96: ea4f 02c8 mov.w r2, r8, lsl #3 - 8001b9a: 4690 mov r8, r2 - 8001b9c: 4699 mov r9, r3 - 8001b9e: 4623 mov r3, r4 - 8001ba0: eb18 0303 adds.w r3, r8, r3 - 8001ba4: f8c7 30e0 str.w r3, [r7, #224] ; 0xe0 - 8001ba8: 462b mov r3, r5 - 8001baa: eb49 0303 adc.w r3, r9, r3 - 8001bae: f8c7 30e4 str.w r3, [r7, #228] ; 0xe4 - 8001bb2: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4 - 8001bb6: 685b ldr r3, [r3, #4] - 8001bb8: 2200 movs r2, #0 - 8001bba: f8c7 30d8 str.w r3, [r7, #216] ; 0xd8 - 8001bbe: f8c7 20dc str.w r2, [r7, #220] ; 0xdc - 8001bc2: e9d7 1236 ldrd r1, r2, [r7, #216] ; 0xd8 - 8001bc6: 460b mov r3, r1 - 8001bc8: 18db adds r3, r3, r3 - 8001bca: 653b str r3, [r7, #80] ; 0x50 - 8001bcc: 4613 mov r3, r2 - 8001bce: eb42 0303 adc.w r3, r2, r3 - 8001bd2: 657b str r3, [r7, #84] ; 0x54 - 8001bd4: e9d7 2314 ldrd r2, r3, [r7, #80] ; 0x50 - 8001bd8: e9d7 0138 ldrd r0, r1, [r7, #224] ; 0xe0 - 8001bdc: f7fe fafc bl 80001d8 <__aeabi_uldivmod> - 8001be0: 4602 mov r2, r0 - 8001be2: 460b mov r3, r1 - 8001be4: 4b61 ldr r3, [pc, #388] ; (8001d6c ) - 8001be6: fba3 2302 umull r2, r3, r3, r2 - 8001bea: 095b lsrs r3, r3, #5 - 8001bec: 011c lsls r4, r3, #4 - 8001bee: f8d7 30fc ldr.w r3, [r7, #252] ; 0xfc - 8001bf2: 2200 movs r2, #0 - 8001bf4: f8c7 30d0 str.w r3, [r7, #208] ; 0xd0 - 8001bf8: f8c7 20d4 str.w r2, [r7, #212] ; 0xd4 - 8001bfc: e9d7 8934 ldrd r8, r9, [r7, #208] ; 0xd0 - 8001c00: 4642 mov r2, r8 - 8001c02: 464b mov r3, r9 - 8001c04: 1891 adds r1, r2, r2 - 8001c06: 64b9 str r1, [r7, #72] ; 0x48 - 8001c08: 415b adcs r3, r3 - 8001c0a: 64fb str r3, [r7, #76] ; 0x4c - 8001c0c: e9d7 2312 ldrd r2, r3, [r7, #72] ; 0x48 - 8001c10: 4641 mov r1, r8 - 8001c12: eb12 0a01 adds.w sl, r2, r1 - 8001c16: 4649 mov r1, r9 - 8001c18: eb43 0b01 adc.w fp, r3, r1 - 8001c1c: f04f 0200 mov.w r2, #0 - 8001c20: f04f 0300 mov.w r3, #0 - 8001c24: ea4f 03cb mov.w r3, fp, lsl #3 - 8001c28: ea43 735a orr.w r3, r3, sl, lsr #29 - 8001c2c: ea4f 02ca mov.w r2, sl, lsl #3 - 8001c30: 4692 mov sl, r2 - 8001c32: 469b mov fp, r3 - 8001c34: 4643 mov r3, r8 - 8001c36: eb1a 0303 adds.w r3, sl, r3 - 8001c3a: f8c7 30c8 str.w r3, [r7, #200] ; 0xc8 - 8001c3e: 464b mov r3, r9 - 8001c40: eb4b 0303 adc.w r3, fp, r3 - 8001c44: f8c7 30cc str.w r3, [r7, #204] ; 0xcc - 8001c48: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4 - 8001c4c: 685b ldr r3, [r3, #4] - 8001c4e: 2200 movs r2, #0 - 8001c50: f8c7 30c0 str.w r3, [r7, #192] ; 0xc0 - 8001c54: f8c7 20c4 str.w r2, [r7, #196] ; 0xc4 - 8001c58: e9d7 1230 ldrd r1, r2, [r7, #192] ; 0xc0 - 8001c5c: 460b mov r3, r1 - 8001c5e: 18db adds r3, r3, r3 - 8001c60: 643b str r3, [r7, #64] ; 0x40 - 8001c62: 4613 mov r3, r2 - 8001c64: eb42 0303 adc.w r3, r2, r3 - 8001c68: 647b str r3, [r7, #68] ; 0x44 - 8001c6a: e9d7 2310 ldrd r2, r3, [r7, #64] ; 0x40 - 8001c6e: e9d7 0132 ldrd r0, r1, [r7, #200] ; 0xc8 - 8001c72: f7fe fab1 bl 80001d8 <__aeabi_uldivmod> - 8001c76: 4602 mov r2, r0 - 8001c78: 460b mov r3, r1 - 8001c7a: 4611 mov r1, r2 - 8001c7c: 4b3b ldr r3, [pc, #236] ; (8001d6c ) - 8001c7e: fba3 2301 umull r2, r3, r3, r1 - 8001c82: 095b lsrs r3, r3, #5 - 8001c84: 2264 movs r2, #100 ; 0x64 - 8001c86: fb02 f303 mul.w r3, r2, r3 - 8001c8a: 1acb subs r3, r1, r3 - 8001c8c: 00db lsls r3, r3, #3 - 8001c8e: f103 0232 add.w r2, r3, #50 ; 0x32 - 8001c92: 4b36 ldr r3, [pc, #216] ; (8001d6c ) - 8001c94: fba3 2302 umull r2, r3, r3, r2 - 8001c98: 095b lsrs r3, r3, #5 - 8001c9a: 005b lsls r3, r3, #1 - 8001c9c: f403 73f8 and.w r3, r3, #496 ; 0x1f0 - 8001ca0: 441c add r4, r3 - 8001ca2: f8d7 30fc ldr.w r3, [r7, #252] ; 0xfc - 8001ca6: 2200 movs r2, #0 - 8001ca8: f8c7 30b8 str.w r3, [r7, #184] ; 0xb8 - 8001cac: f8c7 20bc str.w r2, [r7, #188] ; 0xbc - 8001cb0: e9d7 892e ldrd r8, r9, [r7, #184] ; 0xb8 - 8001cb4: 4642 mov r2, r8 - 8001cb6: 464b mov r3, r9 - 8001cb8: 1891 adds r1, r2, r2 - 8001cba: 63b9 str r1, [r7, #56] ; 0x38 - 8001cbc: 415b adcs r3, r3 - 8001cbe: 63fb str r3, [r7, #60] ; 0x3c - 8001cc0: e9d7 230e ldrd r2, r3, [r7, #56] ; 0x38 - 8001cc4: 4641 mov r1, r8 - 8001cc6: 1851 adds r1, r2, r1 - 8001cc8: 6339 str r1, [r7, #48] ; 0x30 - 8001cca: 4649 mov r1, r9 - 8001ccc: 414b adcs r3, r1 - 8001cce: 637b str r3, [r7, #52] ; 0x34 - 8001cd0: f04f 0200 mov.w r2, #0 - 8001cd4: f04f 0300 mov.w r3, #0 - 8001cd8: e9d7 ab0c ldrd sl, fp, [r7, #48] ; 0x30 - 8001cdc: 4659 mov r1, fp - 8001cde: 00cb lsls r3, r1, #3 - 8001ce0: 4651 mov r1, sl - 8001ce2: ea43 7351 orr.w r3, r3, r1, lsr #29 - 8001ce6: 4651 mov r1, sl - 8001ce8: 00ca lsls r2, r1, #3 - 8001cea: 4610 mov r0, r2 - 8001cec: 4619 mov r1, r3 - 8001cee: 4603 mov r3, r0 - 8001cf0: 4642 mov r2, r8 - 8001cf2: 189b adds r3, r3, r2 - 8001cf4: f8c7 30b0 str.w r3, [r7, #176] ; 0xb0 - 8001cf8: 464b mov r3, r9 - 8001cfa: 460a mov r2, r1 - 8001cfc: eb42 0303 adc.w r3, r2, r3 - 8001d00: f8c7 30b4 str.w r3, [r7, #180] ; 0xb4 - 8001d04: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4 - 8001d08: 685b ldr r3, [r3, #4] - 8001d0a: 2200 movs r2, #0 - 8001d0c: f8c7 30a8 str.w r3, [r7, #168] ; 0xa8 - 8001d10: f8c7 20ac str.w r2, [r7, #172] ; 0xac - 8001d14: e9d7 122a ldrd r1, r2, [r7, #168] ; 0xa8 - 8001d18: 460b mov r3, r1 - 8001d1a: 18db adds r3, r3, r3 - 8001d1c: 62bb str r3, [r7, #40] ; 0x28 - 8001d1e: 4613 mov r3, r2 - 8001d20: eb42 0303 adc.w r3, r2, r3 - 8001d24: 62fb str r3, [r7, #44] ; 0x2c - 8001d26: e9d7 230a ldrd r2, r3, [r7, #40] ; 0x28 - 8001d2a: e9d7 012c ldrd r0, r1, [r7, #176] ; 0xb0 - 8001d2e: f7fe fa53 bl 80001d8 <__aeabi_uldivmod> - 8001d32: 4602 mov r2, r0 - 8001d34: 460b mov r3, r1 - 8001d36: 4b0d ldr r3, [pc, #52] ; (8001d6c ) - 8001d38: fba3 1302 umull r1, r3, r3, r2 - 8001d3c: 095b lsrs r3, r3, #5 - 8001d3e: 2164 movs r1, #100 ; 0x64 - 8001d40: fb01 f303 mul.w r3, r1, r3 - 8001d44: 1ad3 subs r3, r2, r3 - 8001d46: 00db lsls r3, r3, #3 - 8001d48: 3332 adds r3, #50 ; 0x32 - 8001d4a: 4a08 ldr r2, [pc, #32] ; (8001d6c ) - 8001d4c: fba2 2303 umull r2, r3, r2, r3 - 8001d50: 095b lsrs r3, r3, #5 - 8001d52: f003 0207 and.w r2, r3, #7 - 8001d56: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4 - 8001d5a: 681b ldr r3, [r3, #0] - 8001d5c: 4422 add r2, r4 - 8001d5e: 609a str r2, [r3, #8] + 8001d54: f8d7 30fc ldr.w r3, [r7, #252] ; 0xfc + 8001d58: 2200 movs r2, #0 + 8001d5a: f8c7 30e8 str.w r3, [r7, #232] ; 0xe8 + 8001d5e: f8c7 20ec str.w r2, [r7, #236] ; 0xec + 8001d62: e9d7 453a ldrd r4, r5, [r7, #232] ; 0xe8 + 8001d66: 4622 mov r2, r4 + 8001d68: 462b mov r3, r5 + 8001d6a: 1891 adds r1, r2, r2 + 8001d6c: 65b9 str r1, [r7, #88] ; 0x58 + 8001d6e: 415b adcs r3, r3 + 8001d70: 65fb str r3, [r7, #92] ; 0x5c + 8001d72: e9d7 2316 ldrd r2, r3, [r7, #88] ; 0x58 + 8001d76: 4621 mov r1, r4 + 8001d78: eb12 0801 adds.w r8, r2, r1 + 8001d7c: 4629 mov r1, r5 + 8001d7e: eb43 0901 adc.w r9, r3, r1 + 8001d82: f04f 0200 mov.w r2, #0 + 8001d86: f04f 0300 mov.w r3, #0 + 8001d8a: ea4f 03c9 mov.w r3, r9, lsl #3 + 8001d8e: ea43 7358 orr.w r3, r3, r8, lsr #29 + 8001d92: ea4f 02c8 mov.w r2, r8, lsl #3 + 8001d96: 4690 mov r8, r2 + 8001d98: 4699 mov r9, r3 + 8001d9a: 4623 mov r3, r4 + 8001d9c: eb18 0303 adds.w r3, r8, r3 + 8001da0: f8c7 30e0 str.w r3, [r7, #224] ; 0xe0 + 8001da4: 462b mov r3, r5 + 8001da6: eb49 0303 adc.w r3, r9, r3 + 8001daa: f8c7 30e4 str.w r3, [r7, #228] ; 0xe4 + 8001dae: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4 + 8001db2: 685b ldr r3, [r3, #4] + 8001db4: 2200 movs r2, #0 + 8001db6: f8c7 30d8 str.w r3, [r7, #216] ; 0xd8 + 8001dba: f8c7 20dc str.w r2, [r7, #220] ; 0xdc + 8001dbe: e9d7 1236 ldrd r1, r2, [r7, #216] ; 0xd8 + 8001dc2: 460b mov r3, r1 + 8001dc4: 18db adds r3, r3, r3 + 8001dc6: 653b str r3, [r7, #80] ; 0x50 + 8001dc8: 4613 mov r3, r2 + 8001dca: eb42 0303 adc.w r3, r2, r3 + 8001dce: 657b str r3, [r7, #84] ; 0x54 + 8001dd0: e9d7 2314 ldrd r2, r3, [r7, #80] ; 0x50 + 8001dd4: e9d7 0138 ldrd r0, r1, [r7, #224] ; 0xe0 + 8001dd8: f7fe f9fe bl 80001d8 <__aeabi_uldivmod> + 8001ddc: 4602 mov r2, r0 + 8001dde: 460b mov r3, r1 + 8001de0: 4b61 ldr r3, [pc, #388] ; (8001f68 ) + 8001de2: fba3 2302 umull r2, r3, r3, r2 + 8001de6: 095b lsrs r3, r3, #5 + 8001de8: 011c lsls r4, r3, #4 + 8001dea: f8d7 30fc ldr.w r3, [r7, #252] ; 0xfc + 8001dee: 2200 movs r2, #0 + 8001df0: f8c7 30d0 str.w r3, [r7, #208] ; 0xd0 + 8001df4: f8c7 20d4 str.w r2, [r7, #212] ; 0xd4 + 8001df8: e9d7 8934 ldrd r8, r9, [r7, #208] ; 0xd0 + 8001dfc: 4642 mov r2, r8 + 8001dfe: 464b mov r3, r9 + 8001e00: 1891 adds r1, r2, r2 + 8001e02: 64b9 str r1, [r7, #72] ; 0x48 + 8001e04: 415b adcs r3, r3 + 8001e06: 64fb str r3, [r7, #76] ; 0x4c + 8001e08: e9d7 2312 ldrd r2, r3, [r7, #72] ; 0x48 + 8001e0c: 4641 mov r1, r8 + 8001e0e: eb12 0a01 adds.w sl, r2, r1 + 8001e12: 4649 mov r1, r9 + 8001e14: eb43 0b01 adc.w fp, r3, r1 + 8001e18: f04f 0200 mov.w r2, #0 + 8001e1c: f04f 0300 mov.w r3, #0 + 8001e20: ea4f 03cb mov.w r3, fp, lsl #3 + 8001e24: ea43 735a orr.w r3, r3, sl, lsr #29 + 8001e28: ea4f 02ca mov.w r2, sl, lsl #3 + 8001e2c: 4692 mov sl, r2 + 8001e2e: 469b mov fp, r3 + 8001e30: 4643 mov r3, r8 + 8001e32: eb1a 0303 adds.w r3, sl, r3 + 8001e36: f8c7 30c8 str.w r3, [r7, #200] ; 0xc8 + 8001e3a: 464b mov r3, r9 + 8001e3c: eb4b 0303 adc.w r3, fp, r3 + 8001e40: f8c7 30cc str.w r3, [r7, #204] ; 0xcc + 8001e44: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4 + 8001e48: 685b ldr r3, [r3, #4] + 8001e4a: 2200 movs r2, #0 + 8001e4c: f8c7 30c0 str.w r3, [r7, #192] ; 0xc0 + 8001e50: f8c7 20c4 str.w r2, [r7, #196] ; 0xc4 + 8001e54: e9d7 1230 ldrd r1, r2, [r7, #192] ; 0xc0 + 8001e58: 460b mov r3, r1 + 8001e5a: 18db adds r3, r3, r3 + 8001e5c: 643b str r3, [r7, #64] ; 0x40 + 8001e5e: 4613 mov r3, r2 + 8001e60: eb42 0303 adc.w r3, r2, r3 + 8001e64: 647b str r3, [r7, #68] ; 0x44 + 8001e66: e9d7 2310 ldrd r2, r3, [r7, #64] ; 0x40 + 8001e6a: e9d7 0132 ldrd r0, r1, [r7, #200] ; 0xc8 + 8001e6e: f7fe f9b3 bl 80001d8 <__aeabi_uldivmod> + 8001e72: 4602 mov r2, r0 + 8001e74: 460b mov r3, r1 + 8001e76: 4611 mov r1, r2 + 8001e78: 4b3b ldr r3, [pc, #236] ; (8001f68 ) + 8001e7a: fba3 2301 umull r2, r3, r3, r1 + 8001e7e: 095b lsrs r3, r3, #5 + 8001e80: 2264 movs r2, #100 ; 0x64 + 8001e82: fb02 f303 mul.w r3, r2, r3 + 8001e86: 1acb subs r3, r1, r3 + 8001e88: 00db lsls r3, r3, #3 + 8001e8a: f103 0232 add.w r2, r3, #50 ; 0x32 + 8001e8e: 4b36 ldr r3, [pc, #216] ; (8001f68 ) + 8001e90: fba3 2302 umull r2, r3, r3, r2 + 8001e94: 095b lsrs r3, r3, #5 + 8001e96: 005b lsls r3, r3, #1 + 8001e98: f403 73f8 and.w r3, r3, #496 ; 0x1f0 + 8001e9c: 441c add r4, r3 + 8001e9e: f8d7 30fc ldr.w r3, [r7, #252] ; 0xfc + 8001ea2: 2200 movs r2, #0 + 8001ea4: f8c7 30b8 str.w r3, [r7, #184] ; 0xb8 + 8001ea8: f8c7 20bc str.w r2, [r7, #188] ; 0xbc + 8001eac: e9d7 892e ldrd r8, r9, [r7, #184] ; 0xb8 + 8001eb0: 4642 mov r2, r8 + 8001eb2: 464b mov r3, r9 + 8001eb4: 1891 adds r1, r2, r2 + 8001eb6: 63b9 str r1, [r7, #56] ; 0x38 + 8001eb8: 415b adcs r3, r3 + 8001eba: 63fb str r3, [r7, #60] ; 0x3c + 8001ebc: e9d7 230e ldrd r2, r3, [r7, #56] ; 0x38 + 8001ec0: 4641 mov r1, r8 + 8001ec2: 1851 adds r1, r2, r1 + 8001ec4: 6339 str r1, [r7, #48] ; 0x30 + 8001ec6: 4649 mov r1, r9 + 8001ec8: 414b adcs r3, r1 + 8001eca: 637b str r3, [r7, #52] ; 0x34 + 8001ecc: f04f 0200 mov.w r2, #0 + 8001ed0: f04f 0300 mov.w r3, #0 + 8001ed4: e9d7 ab0c ldrd sl, fp, [r7, #48] ; 0x30 + 8001ed8: 4659 mov r1, fp + 8001eda: 00cb lsls r3, r1, #3 + 8001edc: 4651 mov r1, sl + 8001ede: ea43 7351 orr.w r3, r3, r1, lsr #29 + 8001ee2: 4651 mov r1, sl + 8001ee4: 00ca lsls r2, r1, #3 + 8001ee6: 4610 mov r0, r2 + 8001ee8: 4619 mov r1, r3 + 8001eea: 4603 mov r3, r0 + 8001eec: 4642 mov r2, r8 + 8001eee: 189b adds r3, r3, r2 + 8001ef0: f8c7 30b0 str.w r3, [r7, #176] ; 0xb0 + 8001ef4: 464b mov r3, r9 + 8001ef6: 460a mov r2, r1 + 8001ef8: eb42 0303 adc.w r3, r2, r3 + 8001efc: f8c7 30b4 str.w r3, [r7, #180] ; 0xb4 + 8001f00: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4 + 8001f04: 685b ldr r3, [r3, #4] + 8001f06: 2200 movs r2, #0 + 8001f08: f8c7 30a8 str.w r3, [r7, #168] ; 0xa8 + 8001f0c: f8c7 20ac str.w r2, [r7, #172] ; 0xac + 8001f10: e9d7 122a ldrd r1, r2, [r7, #168] ; 0xa8 + 8001f14: 460b mov r3, r1 + 8001f16: 18db adds r3, r3, r3 + 8001f18: 62bb str r3, [r7, #40] ; 0x28 + 8001f1a: 4613 mov r3, r2 + 8001f1c: eb42 0303 adc.w r3, r2, r3 + 8001f20: 62fb str r3, [r7, #44] ; 0x2c + 8001f22: e9d7 230a ldrd r2, r3, [r7, #40] ; 0x28 + 8001f26: e9d7 012c ldrd r0, r1, [r7, #176] ; 0xb0 + 8001f2a: f7fe f955 bl 80001d8 <__aeabi_uldivmod> + 8001f2e: 4602 mov r2, r0 + 8001f30: 460b mov r3, r1 + 8001f32: 4b0d ldr r3, [pc, #52] ; (8001f68 ) + 8001f34: fba3 1302 umull r1, r3, r3, r2 + 8001f38: 095b lsrs r3, r3, #5 + 8001f3a: 2164 movs r1, #100 ; 0x64 + 8001f3c: fb01 f303 mul.w r3, r1, r3 + 8001f40: 1ad3 subs r3, r2, r3 + 8001f42: 00db lsls r3, r3, #3 + 8001f44: 3332 adds r3, #50 ; 0x32 + 8001f46: 4a08 ldr r2, [pc, #32] ; (8001f68 ) + 8001f48: fba2 2303 umull r2, r3, r2, r3 + 8001f4c: 095b lsrs r3, r3, #5 + 8001f4e: f003 0207 and.w r2, r3, #7 + 8001f52: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4 + 8001f56: 681b ldr r3, [r3, #0] + 8001f58: 4422 add r2, r4 + 8001f5a: 609a str r2, [r3, #8] } else { huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate); } } - 8001d60: e106 b.n 8001f70 - 8001d62: bf00 nop - 8001d64: 40011000 .word 0x40011000 - 8001d68: 40011400 .word 0x40011400 - 8001d6c: 51eb851f .word 0x51eb851f + 8001f5c: e106 b.n 800216c + 8001f5e: bf00 nop + 8001f60: 40011000 .word 0x40011000 + 8001f64: 40011400 .word 0x40011400 + 8001f68: 51eb851f .word 0x51eb851f huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate); - 8001d70: f8d7 30fc ldr.w r3, [r7, #252] ; 0xfc - 8001d74: 2200 movs r2, #0 - 8001d76: f8c7 30a0 str.w r3, [r7, #160] ; 0xa0 - 8001d7a: f8c7 20a4 str.w r2, [r7, #164] ; 0xa4 - 8001d7e: e9d7 8928 ldrd r8, r9, [r7, #160] ; 0xa0 - 8001d82: 4642 mov r2, r8 - 8001d84: 464b mov r3, r9 - 8001d86: 1891 adds r1, r2, r2 - 8001d88: 6239 str r1, [r7, #32] - 8001d8a: 415b adcs r3, r3 - 8001d8c: 627b str r3, [r7, #36] ; 0x24 - 8001d8e: e9d7 2308 ldrd r2, r3, [r7, #32] - 8001d92: 4641 mov r1, r8 - 8001d94: 1854 adds r4, r2, r1 - 8001d96: 4649 mov r1, r9 - 8001d98: eb43 0501 adc.w r5, r3, r1 - 8001d9c: f04f 0200 mov.w r2, #0 - 8001da0: f04f 0300 mov.w r3, #0 - 8001da4: 00eb lsls r3, r5, #3 - 8001da6: ea43 7354 orr.w r3, r3, r4, lsr #29 - 8001daa: 00e2 lsls r2, r4, #3 - 8001dac: 4614 mov r4, r2 - 8001dae: 461d mov r5, r3 - 8001db0: 4643 mov r3, r8 - 8001db2: 18e3 adds r3, r4, r3 - 8001db4: f8c7 3098 str.w r3, [r7, #152] ; 0x98 - 8001db8: 464b mov r3, r9 - 8001dba: eb45 0303 adc.w r3, r5, r3 - 8001dbe: f8c7 309c str.w r3, [r7, #156] ; 0x9c - 8001dc2: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4 - 8001dc6: 685b ldr r3, [r3, #4] - 8001dc8: 2200 movs r2, #0 - 8001dca: f8c7 3090 str.w r3, [r7, #144] ; 0x90 - 8001dce: f8c7 2094 str.w r2, [r7, #148] ; 0x94 - 8001dd2: f04f 0200 mov.w r2, #0 - 8001dd6: f04f 0300 mov.w r3, #0 - 8001dda: e9d7 4524 ldrd r4, r5, [r7, #144] ; 0x90 - 8001dde: 4629 mov r1, r5 - 8001de0: 008b lsls r3, r1, #2 - 8001de2: 4621 mov r1, r4 - 8001de4: ea43 7391 orr.w r3, r3, r1, lsr #30 - 8001de8: 4621 mov r1, r4 - 8001dea: 008a lsls r2, r1, #2 - 8001dec: e9d7 0126 ldrd r0, r1, [r7, #152] ; 0x98 - 8001df0: f7fe f9f2 bl 80001d8 <__aeabi_uldivmod> - 8001df4: 4602 mov r2, r0 - 8001df6: 460b mov r3, r1 - 8001df8: 4b60 ldr r3, [pc, #384] ; (8001f7c ) - 8001dfa: fba3 2302 umull r2, r3, r3, r2 - 8001dfe: 095b lsrs r3, r3, #5 - 8001e00: 011c lsls r4, r3, #4 - 8001e02: f8d7 30fc ldr.w r3, [r7, #252] ; 0xfc - 8001e06: 2200 movs r2, #0 - 8001e08: f8c7 3088 str.w r3, [r7, #136] ; 0x88 - 8001e0c: f8c7 208c str.w r2, [r7, #140] ; 0x8c - 8001e10: e9d7 8922 ldrd r8, r9, [r7, #136] ; 0x88 - 8001e14: 4642 mov r2, r8 - 8001e16: 464b mov r3, r9 - 8001e18: 1891 adds r1, r2, r2 - 8001e1a: 61b9 str r1, [r7, #24] - 8001e1c: 415b adcs r3, r3 - 8001e1e: 61fb str r3, [r7, #28] - 8001e20: e9d7 2306 ldrd r2, r3, [r7, #24] - 8001e24: 4641 mov r1, r8 - 8001e26: 1851 adds r1, r2, r1 - 8001e28: 6139 str r1, [r7, #16] - 8001e2a: 4649 mov r1, r9 - 8001e2c: 414b adcs r3, r1 - 8001e2e: 617b str r3, [r7, #20] - 8001e30: f04f 0200 mov.w r2, #0 - 8001e34: f04f 0300 mov.w r3, #0 - 8001e38: e9d7 ab04 ldrd sl, fp, [r7, #16] - 8001e3c: 4659 mov r1, fp - 8001e3e: 00cb lsls r3, r1, #3 - 8001e40: 4651 mov r1, sl - 8001e42: ea43 7351 orr.w r3, r3, r1, lsr #29 - 8001e46: 4651 mov r1, sl - 8001e48: 00ca lsls r2, r1, #3 - 8001e4a: 4610 mov r0, r2 - 8001e4c: 4619 mov r1, r3 - 8001e4e: 4603 mov r3, r0 - 8001e50: 4642 mov r2, r8 - 8001e52: 189b adds r3, r3, r2 - 8001e54: f8c7 3080 str.w r3, [r7, #128] ; 0x80 - 8001e58: 464b mov r3, r9 - 8001e5a: 460a mov r2, r1 - 8001e5c: eb42 0303 adc.w r3, r2, r3 - 8001e60: f8c7 3084 str.w r3, [r7, #132] ; 0x84 - 8001e64: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4 - 8001e68: 685b ldr r3, [r3, #4] - 8001e6a: 2200 movs r2, #0 - 8001e6c: 67bb str r3, [r7, #120] ; 0x78 - 8001e6e: 67fa str r2, [r7, #124] ; 0x7c - 8001e70: f04f 0200 mov.w r2, #0 - 8001e74: f04f 0300 mov.w r3, #0 - 8001e78: e9d7 891e ldrd r8, r9, [r7, #120] ; 0x78 - 8001e7c: 4649 mov r1, r9 - 8001e7e: 008b lsls r3, r1, #2 - 8001e80: 4641 mov r1, r8 - 8001e82: ea43 7391 orr.w r3, r3, r1, lsr #30 - 8001e86: 4641 mov r1, r8 - 8001e88: 008a lsls r2, r1, #2 - 8001e8a: e9d7 0120 ldrd r0, r1, [r7, #128] ; 0x80 - 8001e8e: f7fe f9a3 bl 80001d8 <__aeabi_uldivmod> - 8001e92: 4602 mov r2, r0 - 8001e94: 460b mov r3, r1 - 8001e96: 4611 mov r1, r2 - 8001e98: 4b38 ldr r3, [pc, #224] ; (8001f7c ) - 8001e9a: fba3 2301 umull r2, r3, r3, r1 - 8001e9e: 095b lsrs r3, r3, #5 - 8001ea0: 2264 movs r2, #100 ; 0x64 - 8001ea2: fb02 f303 mul.w r3, r2, r3 - 8001ea6: 1acb subs r3, r1, r3 - 8001ea8: 011b lsls r3, r3, #4 - 8001eaa: 3332 adds r3, #50 ; 0x32 - 8001eac: 4a33 ldr r2, [pc, #204] ; (8001f7c ) - 8001eae: fba2 2303 umull r2, r3, r2, r3 - 8001eb2: 095b lsrs r3, r3, #5 - 8001eb4: f003 03f0 and.w r3, r3, #240 ; 0xf0 - 8001eb8: 441c add r4, r3 - 8001eba: f8d7 30fc ldr.w r3, [r7, #252] ; 0xfc - 8001ebe: 2200 movs r2, #0 - 8001ec0: 673b str r3, [r7, #112] ; 0x70 - 8001ec2: 677a str r2, [r7, #116] ; 0x74 - 8001ec4: e9d7 891c ldrd r8, r9, [r7, #112] ; 0x70 - 8001ec8: 4642 mov r2, r8 - 8001eca: 464b mov r3, r9 - 8001ecc: 1891 adds r1, r2, r2 - 8001ece: 60b9 str r1, [r7, #8] - 8001ed0: 415b adcs r3, r3 - 8001ed2: 60fb str r3, [r7, #12] - 8001ed4: e9d7 2302 ldrd r2, r3, [r7, #8] - 8001ed8: 4641 mov r1, r8 - 8001eda: 1851 adds r1, r2, r1 - 8001edc: 6039 str r1, [r7, #0] - 8001ede: 4649 mov r1, r9 - 8001ee0: 414b adcs r3, r1 - 8001ee2: 607b str r3, [r7, #4] - 8001ee4: f04f 0200 mov.w r2, #0 - 8001ee8: f04f 0300 mov.w r3, #0 - 8001eec: e9d7 ab00 ldrd sl, fp, [r7] - 8001ef0: 4659 mov r1, fp - 8001ef2: 00cb lsls r3, r1, #3 - 8001ef4: 4651 mov r1, sl - 8001ef6: ea43 7351 orr.w r3, r3, r1, lsr #29 - 8001efa: 4651 mov r1, sl - 8001efc: 00ca lsls r2, r1, #3 - 8001efe: 4610 mov r0, r2 - 8001f00: 4619 mov r1, r3 - 8001f02: 4603 mov r3, r0 - 8001f04: 4642 mov r2, r8 - 8001f06: 189b adds r3, r3, r2 - 8001f08: 66bb str r3, [r7, #104] ; 0x68 - 8001f0a: 464b mov r3, r9 - 8001f0c: 460a mov r2, r1 - 8001f0e: eb42 0303 adc.w r3, r2, r3 - 8001f12: 66fb str r3, [r7, #108] ; 0x6c - 8001f14: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4 - 8001f18: 685b ldr r3, [r3, #4] - 8001f1a: 2200 movs r2, #0 - 8001f1c: 663b str r3, [r7, #96] ; 0x60 - 8001f1e: 667a str r2, [r7, #100] ; 0x64 - 8001f20: f04f 0200 mov.w r2, #0 - 8001f24: f04f 0300 mov.w r3, #0 - 8001f28: e9d7 8918 ldrd r8, r9, [r7, #96] ; 0x60 - 8001f2c: 4649 mov r1, r9 - 8001f2e: 008b lsls r3, r1, #2 - 8001f30: 4641 mov r1, r8 - 8001f32: ea43 7391 orr.w r3, r3, r1, lsr #30 - 8001f36: 4641 mov r1, r8 - 8001f38: 008a lsls r2, r1, #2 - 8001f3a: e9d7 011a ldrd r0, r1, [r7, #104] ; 0x68 - 8001f3e: f7fe f94b bl 80001d8 <__aeabi_uldivmod> - 8001f42: 4602 mov r2, r0 - 8001f44: 460b mov r3, r1 - 8001f46: 4b0d ldr r3, [pc, #52] ; (8001f7c ) - 8001f48: fba3 1302 umull r1, r3, r3, r2 - 8001f4c: 095b lsrs r3, r3, #5 - 8001f4e: 2164 movs r1, #100 ; 0x64 - 8001f50: fb01 f303 mul.w r3, r1, r3 - 8001f54: 1ad3 subs r3, r2, r3 - 8001f56: 011b lsls r3, r3, #4 - 8001f58: 3332 adds r3, #50 ; 0x32 - 8001f5a: 4a08 ldr r2, [pc, #32] ; (8001f7c ) - 8001f5c: fba2 2303 umull r2, r3, r2, r3 - 8001f60: 095b lsrs r3, r3, #5 - 8001f62: f003 020f and.w r2, r3, #15 - 8001f66: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4 - 8001f6a: 681b ldr r3, [r3, #0] - 8001f6c: 4422 add r2, r4 - 8001f6e: 609a str r2, [r3, #8] + 8001f6c: f8d7 30fc ldr.w r3, [r7, #252] ; 0xfc + 8001f70: 2200 movs r2, #0 + 8001f72: f8c7 30a0 str.w r3, [r7, #160] ; 0xa0 + 8001f76: f8c7 20a4 str.w r2, [r7, #164] ; 0xa4 + 8001f7a: e9d7 8928 ldrd r8, r9, [r7, #160] ; 0xa0 + 8001f7e: 4642 mov r2, r8 + 8001f80: 464b mov r3, r9 + 8001f82: 1891 adds r1, r2, r2 + 8001f84: 6239 str r1, [r7, #32] + 8001f86: 415b adcs r3, r3 + 8001f88: 627b str r3, [r7, #36] ; 0x24 + 8001f8a: e9d7 2308 ldrd r2, r3, [r7, #32] + 8001f8e: 4641 mov r1, r8 + 8001f90: 1854 adds r4, r2, r1 + 8001f92: 4649 mov r1, r9 + 8001f94: eb43 0501 adc.w r5, r3, r1 + 8001f98: f04f 0200 mov.w r2, #0 + 8001f9c: f04f 0300 mov.w r3, #0 + 8001fa0: 00eb lsls r3, r5, #3 + 8001fa2: ea43 7354 orr.w r3, r3, r4, lsr #29 + 8001fa6: 00e2 lsls r2, r4, #3 + 8001fa8: 4614 mov r4, r2 + 8001faa: 461d mov r5, r3 + 8001fac: 4643 mov r3, r8 + 8001fae: 18e3 adds r3, r4, r3 + 8001fb0: f8c7 3098 str.w r3, [r7, #152] ; 0x98 + 8001fb4: 464b mov r3, r9 + 8001fb6: eb45 0303 adc.w r3, r5, r3 + 8001fba: f8c7 309c str.w r3, [r7, #156] ; 0x9c + 8001fbe: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4 + 8001fc2: 685b ldr r3, [r3, #4] + 8001fc4: 2200 movs r2, #0 + 8001fc6: f8c7 3090 str.w r3, [r7, #144] ; 0x90 + 8001fca: f8c7 2094 str.w r2, [r7, #148] ; 0x94 + 8001fce: f04f 0200 mov.w r2, #0 + 8001fd2: f04f 0300 mov.w r3, #0 + 8001fd6: e9d7 4524 ldrd r4, r5, [r7, #144] ; 0x90 + 8001fda: 4629 mov r1, r5 + 8001fdc: 008b lsls r3, r1, #2 + 8001fde: 4621 mov r1, r4 + 8001fe0: ea43 7391 orr.w r3, r3, r1, lsr #30 + 8001fe4: 4621 mov r1, r4 + 8001fe6: 008a lsls r2, r1, #2 + 8001fe8: e9d7 0126 ldrd r0, r1, [r7, #152] ; 0x98 + 8001fec: f7fe f8f4 bl 80001d8 <__aeabi_uldivmod> + 8001ff0: 4602 mov r2, r0 + 8001ff2: 460b mov r3, r1 + 8001ff4: 4b60 ldr r3, [pc, #384] ; (8002178 ) + 8001ff6: fba3 2302 umull r2, r3, r3, r2 + 8001ffa: 095b lsrs r3, r3, #5 + 8001ffc: 011c lsls r4, r3, #4 + 8001ffe: f8d7 30fc ldr.w r3, [r7, #252] ; 0xfc + 8002002: 2200 movs r2, #0 + 8002004: f8c7 3088 str.w r3, [r7, #136] ; 0x88 + 8002008: f8c7 208c str.w r2, [r7, #140] ; 0x8c + 800200c: e9d7 8922 ldrd r8, r9, [r7, #136] ; 0x88 + 8002010: 4642 mov r2, r8 + 8002012: 464b mov r3, r9 + 8002014: 1891 adds r1, r2, r2 + 8002016: 61b9 str r1, [r7, #24] + 8002018: 415b adcs r3, r3 + 800201a: 61fb str r3, [r7, #28] + 800201c: e9d7 2306 ldrd r2, r3, [r7, #24] + 8002020: 4641 mov r1, r8 + 8002022: 1851 adds r1, r2, r1 + 8002024: 6139 str r1, [r7, #16] + 8002026: 4649 mov r1, r9 + 8002028: 414b adcs r3, r1 + 800202a: 617b str r3, [r7, #20] + 800202c: f04f 0200 mov.w r2, #0 + 8002030: f04f 0300 mov.w r3, #0 + 8002034: e9d7 ab04 ldrd sl, fp, [r7, #16] + 8002038: 4659 mov r1, fp + 800203a: 00cb lsls r3, r1, #3 + 800203c: 4651 mov r1, sl + 800203e: ea43 7351 orr.w r3, r3, r1, lsr #29 + 8002042: 4651 mov r1, sl + 8002044: 00ca lsls r2, r1, #3 + 8002046: 4610 mov r0, r2 + 8002048: 4619 mov r1, r3 + 800204a: 4603 mov r3, r0 + 800204c: 4642 mov r2, r8 + 800204e: 189b adds r3, r3, r2 + 8002050: f8c7 3080 str.w r3, [r7, #128] ; 0x80 + 8002054: 464b mov r3, r9 + 8002056: 460a mov r2, r1 + 8002058: eb42 0303 adc.w r3, r2, r3 + 800205c: f8c7 3084 str.w r3, [r7, #132] ; 0x84 + 8002060: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4 + 8002064: 685b ldr r3, [r3, #4] + 8002066: 2200 movs r2, #0 + 8002068: 67bb str r3, [r7, #120] ; 0x78 + 800206a: 67fa str r2, [r7, #124] ; 0x7c + 800206c: f04f 0200 mov.w r2, #0 + 8002070: f04f 0300 mov.w r3, #0 + 8002074: e9d7 891e ldrd r8, r9, [r7, #120] ; 0x78 + 8002078: 4649 mov r1, r9 + 800207a: 008b lsls r3, r1, #2 + 800207c: 4641 mov r1, r8 + 800207e: ea43 7391 orr.w r3, r3, r1, lsr #30 + 8002082: 4641 mov r1, r8 + 8002084: 008a lsls r2, r1, #2 + 8002086: e9d7 0120 ldrd r0, r1, [r7, #128] ; 0x80 + 800208a: f7fe f8a5 bl 80001d8 <__aeabi_uldivmod> + 800208e: 4602 mov r2, r0 + 8002090: 460b mov r3, r1 + 8002092: 4611 mov r1, r2 + 8002094: 4b38 ldr r3, [pc, #224] ; (8002178 ) + 8002096: fba3 2301 umull r2, r3, r3, r1 + 800209a: 095b lsrs r3, r3, #5 + 800209c: 2264 movs r2, #100 ; 0x64 + 800209e: fb02 f303 mul.w r3, r2, r3 + 80020a2: 1acb subs r3, r1, r3 + 80020a4: 011b lsls r3, r3, #4 + 80020a6: 3332 adds r3, #50 ; 0x32 + 80020a8: 4a33 ldr r2, [pc, #204] ; (8002178 ) + 80020aa: fba2 2303 umull r2, r3, r2, r3 + 80020ae: 095b lsrs r3, r3, #5 + 80020b0: f003 03f0 and.w r3, r3, #240 ; 0xf0 + 80020b4: 441c add r4, r3 + 80020b6: f8d7 30fc ldr.w r3, [r7, #252] ; 0xfc + 80020ba: 2200 movs r2, #0 + 80020bc: 673b str r3, [r7, #112] ; 0x70 + 80020be: 677a str r2, [r7, #116] ; 0x74 + 80020c0: e9d7 891c ldrd r8, r9, [r7, #112] ; 0x70 + 80020c4: 4642 mov r2, r8 + 80020c6: 464b mov r3, r9 + 80020c8: 1891 adds r1, r2, r2 + 80020ca: 60b9 str r1, [r7, #8] + 80020cc: 415b adcs r3, r3 + 80020ce: 60fb str r3, [r7, #12] + 80020d0: e9d7 2302 ldrd r2, r3, [r7, #8] + 80020d4: 4641 mov r1, r8 + 80020d6: 1851 adds r1, r2, r1 + 80020d8: 6039 str r1, [r7, #0] + 80020da: 4649 mov r1, r9 + 80020dc: 414b adcs r3, r1 + 80020de: 607b str r3, [r7, #4] + 80020e0: f04f 0200 mov.w r2, #0 + 80020e4: f04f 0300 mov.w r3, #0 + 80020e8: e9d7 ab00 ldrd sl, fp, [r7] + 80020ec: 4659 mov r1, fp + 80020ee: 00cb lsls r3, r1, #3 + 80020f0: 4651 mov r1, sl + 80020f2: ea43 7351 orr.w r3, r3, r1, lsr #29 + 80020f6: 4651 mov r1, sl + 80020f8: 00ca lsls r2, r1, #3 + 80020fa: 4610 mov r0, r2 + 80020fc: 4619 mov r1, r3 + 80020fe: 4603 mov r3, r0 + 8002100: 4642 mov r2, r8 + 8002102: 189b adds r3, r3, r2 + 8002104: 66bb str r3, [r7, #104] ; 0x68 + 8002106: 464b mov r3, r9 + 8002108: 460a mov r2, r1 + 800210a: eb42 0303 adc.w r3, r2, r3 + 800210e: 66fb str r3, [r7, #108] ; 0x6c + 8002110: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4 + 8002114: 685b ldr r3, [r3, #4] + 8002116: 2200 movs r2, #0 + 8002118: 663b str r3, [r7, #96] ; 0x60 + 800211a: 667a str r2, [r7, #100] ; 0x64 + 800211c: f04f 0200 mov.w r2, #0 + 8002120: f04f 0300 mov.w r3, #0 + 8002124: e9d7 8918 ldrd r8, r9, [r7, #96] ; 0x60 + 8002128: 4649 mov r1, r9 + 800212a: 008b lsls r3, r1, #2 + 800212c: 4641 mov r1, r8 + 800212e: ea43 7391 orr.w r3, r3, r1, lsr #30 + 8002132: 4641 mov r1, r8 + 8002134: 008a lsls r2, r1, #2 + 8002136: e9d7 011a ldrd r0, r1, [r7, #104] ; 0x68 + 800213a: f7fe f84d bl 80001d8 <__aeabi_uldivmod> + 800213e: 4602 mov r2, r0 + 8002140: 460b mov r3, r1 + 8002142: 4b0d ldr r3, [pc, #52] ; (8002178 ) + 8002144: fba3 1302 umull r1, r3, r3, r2 + 8002148: 095b lsrs r3, r3, #5 + 800214a: 2164 movs r1, #100 ; 0x64 + 800214c: fb01 f303 mul.w r3, r1, r3 + 8002150: 1ad3 subs r3, r2, r3 + 8002152: 011b lsls r3, r3, #4 + 8002154: 3332 adds r3, #50 ; 0x32 + 8002156: 4a08 ldr r2, [pc, #32] ; (8002178 ) + 8002158: fba2 2303 umull r2, r3, r2, r3 + 800215c: 095b lsrs r3, r3, #5 + 800215e: f003 020f and.w r2, r3, #15 + 8002162: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4 + 8002166: 681b ldr r3, [r3, #0] + 8002168: 4422 add r2, r4 + 800216a: 609a str r2, [r3, #8] } - 8001f70: bf00 nop - 8001f72: f507 7780 add.w r7, r7, #256 ; 0x100 - 8001f76: 46bd mov sp, r7 - 8001f78: e8bd 8fb0 ldmia.w sp!, {r4, r5, r7, r8, r9, sl, fp, pc} - 8001f7c: 51eb851f .word 0x51eb851f + 800216c: bf00 nop + 800216e: f507 7780 add.w r7, r7, #256 ; 0x100 + 8002172: 46bd mov sp, r7 + 8002174: e8bd 8fb0 ldmia.w sp!, {r4, r5, r7, r8, r9, sl, fp, pc} + 8002178: 51eb851f .word 0x51eb851f -08001f80 : - 8001f80: 4402 add r2, r0 - 8001f82: 4603 mov r3, r0 - 8001f84: 4293 cmp r3, r2 - 8001f86: d100 bne.n 8001f8a - 8001f88: 4770 bx lr - 8001f8a: f803 1b01 strb.w r1, [r3], #1 - 8001f8e: e7f9 b.n 8001f84 +0800217c : + 800217c: 4402 add r2, r0 + 800217e: 4603 mov r3, r0 + 8002180: 4293 cmp r3, r2 + 8002182: d100 bne.n 8002186 + 8002184: 4770 bx lr + 8002186: f803 1b01 strb.w r1, [r3], #1 + 800218a: e7f9 b.n 8002180 -08001f90 <__libc_init_array>: - 8001f90: b570 push {r4, r5, r6, lr} - 8001f92: 4d0d ldr r5, [pc, #52] ; (8001fc8 <__libc_init_array+0x38>) - 8001f94: 4c0d ldr r4, [pc, #52] ; (8001fcc <__libc_init_array+0x3c>) - 8001f96: 1b64 subs r4, r4, r5 - 8001f98: 10a4 asrs r4, r4, #2 - 8001f9a: 2600 movs r6, #0 - 8001f9c: 42a6 cmp r6, r4 - 8001f9e: d109 bne.n 8001fb4 <__libc_init_array+0x24> - 8001fa0: 4d0b ldr r5, [pc, #44] ; (8001fd0 <__libc_init_array+0x40>) - 8001fa2: 4c0c ldr r4, [pc, #48] ; (8001fd4 <__libc_init_array+0x44>) - 8001fa4: f000 f818 bl 8001fd8 <_init> - 8001fa8: 1b64 subs r4, r4, r5 - 8001faa: 10a4 asrs r4, r4, #2 - 8001fac: 2600 movs r6, #0 - 8001fae: 42a6 cmp r6, r4 - 8001fb0: d105 bne.n 8001fbe <__libc_init_array+0x2e> - 8001fb2: bd70 pop {r4, r5, r6, pc} - 8001fb4: f855 3b04 ldr.w r3, [r5], #4 - 8001fb8: 4798 blx r3 - 8001fba: 3601 adds r6, #1 - 8001fbc: e7ee b.n 8001f9c <__libc_init_array+0xc> - 8001fbe: f855 3b04 ldr.w r3, [r5], #4 - 8001fc2: 4798 blx r3 - 8001fc4: 3601 adds r6, #1 - 8001fc6: e7f2 b.n 8001fae <__libc_init_array+0x1e> - 8001fc8: 08002018 .word 0x08002018 - 8001fcc: 08002018 .word 0x08002018 - 8001fd0: 08002018 .word 0x08002018 - 8001fd4: 0800201c .word 0x0800201c +0800218c <__libc_init_array>: + 800218c: b570 push {r4, r5, r6, lr} + 800218e: 4d0d ldr r5, [pc, #52] ; (80021c4 <__libc_init_array+0x38>) + 8002190: 4c0d ldr r4, [pc, #52] ; (80021c8 <__libc_init_array+0x3c>) + 8002192: 1b64 subs r4, r4, r5 + 8002194: 10a4 asrs r4, r4, #2 + 8002196: 2600 movs r6, #0 + 8002198: 42a6 cmp r6, r4 + 800219a: d109 bne.n 80021b0 <__libc_init_array+0x24> + 800219c: 4d0b ldr r5, [pc, #44] ; (80021cc <__libc_init_array+0x40>) + 800219e: 4c0c ldr r4, [pc, #48] ; (80021d0 <__libc_init_array+0x44>) + 80021a0: f000 f818 bl 80021d4 <_init> + 80021a4: 1b64 subs r4, r4, r5 + 80021a6: 10a4 asrs r4, r4, #2 + 80021a8: 2600 movs r6, #0 + 80021aa: 42a6 cmp r6, r4 + 80021ac: d105 bne.n 80021ba <__libc_init_array+0x2e> + 80021ae: bd70 pop {r4, r5, r6, pc} + 80021b0: f855 3b04 ldr.w r3, [r5], #4 + 80021b4: 4798 blx r3 + 80021b6: 3601 adds r6, #1 + 80021b8: e7ee b.n 8002198 <__libc_init_array+0xc> + 80021ba: f855 3b04 ldr.w r3, [r5], #4 + 80021be: 4798 blx r3 + 80021c0: 3601 adds r6, #1 + 80021c2: e7f2 b.n 80021aa <__libc_init_array+0x1e> + 80021c4: 0800220c .word 0x0800220c + 80021c8: 0800220c .word 0x0800220c + 80021cc: 0800220c .word 0x0800220c + 80021d0: 08002210 .word 0x08002210 -08001fd8 <_init>: - 8001fd8: b5f8 push {r3, r4, r5, r6, r7, lr} - 8001fda: bf00 nop - 8001fdc: bcf8 pop {r3, r4, r5, r6, r7} - 8001fde: bc08 pop {r3} - 8001fe0: 469e mov lr, r3 - 8001fe2: 4770 bx lr +080021d4 <_init>: + 80021d4: b5f8 push {r3, r4, r5, r6, r7, lr} + 80021d6: bf00 nop + 80021d8: bcf8 pop {r3, r4, r5, r6, r7} + 80021da: bc08 pop {r3} + 80021dc: 469e mov lr, r3 + 80021de: 4770 bx lr -08001fe4 <_fini>: - 8001fe4: b5f8 push {r3, r4, r5, r6, r7, lr} - 8001fe6: bf00 nop - 8001fe8: bcf8 pop {r3, r4, r5, r6, r7} - 8001fea: bc08 pop {r3} - 8001fec: 469e mov lr, r3 - 8001fee: 4770 bx lr +080021e0 <_fini>: + 80021e0: b5f8 push {r3, r4, r5, r6, r7, lr} + 80021e2: bf00 nop + 80021e4: bcf8 pop {r3, r4, r5, r6, r7} + 80021e6: bc08 pop {r3} + 80021e8: 469e mov lr, r3 + 80021ea: 4770 bx lr diff --git a/access_control_stm32/Debug/access_control_stm32.map b/access_control_stm32/Debug/access_control_stm32.map index fb3b524..5fcb2ef 100644 --- a/access_control_stm32/Debug/access_control_stm32.map +++ b/access_control_stm32/Debug/access_control_stm32.map @@ -108,8 +108,6 @@ Discarded input sections .text 0x0000000000000000 0x0 ./Core/Src/main.o .data 0x0000000000000000 0x0 ./Core/Src/main.o .bss 0x0000000000000000 0x0 ./Core/Src/main.o - .bss.uart_index - 0x0000000000000000 0x1 ./Core/Src/main.o .group 0x0000000000000000 0xc ./Core/Src/stm32f4xx_hal_msp.o .group 0x0000000000000000 0xc ./Core/Src/stm32f4xx_hal_msp.o .group 0x0000000000000000 0xc ./Core/Src/stm32f4xx_hal_msp.o @@ -400,7 +398,7 @@ Discarded input sections .debug_macro 0x0000000000000000 0x16 ./Core/Src/syscalls.o .debug_macro 0x0000000000000000 0xce ./Core/Src/syscalls.o .debug_line 0x0000000000000000 0x8a8 ./Core/Src/syscalls.o - .debug_str 0x0000000000000000 0x98b5 ./Core/Src/syscalls.o + .debug_str 0x0000000000000000 0x989c ./Core/Src/syscalls.o .comment 0x0000000000000000 0x44 ./Core/Src/syscalls.o .debug_frame 0x0000000000000000 0x2ac ./Core/Src/syscalls.o .ARM.attributes @@ -463,7 +461,7 @@ Discarded input sections .debug_macro 0x0000000000000000 0x6a ./Core/Src/sysmem.o .debug_macro 0x0000000000000000 0x1df ./Core/Src/sysmem.o .debug_line 0x0000000000000000 0x579 ./Core/Src/sysmem.o - .debug_str 0x0000000000000000 0x606c ./Core/Src/sysmem.o + .debug_str 0x0000000000000000 0x6053 ./Core/Src/sysmem.o .comment 0x0000000000000000 0x44 ./Core/Src/sysmem.o .debug_frame 0x0000000000000000 0x34 ./Core/Src/sysmem.o .ARM.attributes @@ -915,7 +913,7 @@ Discarded input sections .debug_macro 0x0000000000000000 0x295 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.o .debug_macro 0x0000000000000000 0x126 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.o .debug_line 0x0000000000000000 0xf61 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.o - .debug_str 0x0000000000000000 0x7ff25 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.o + .debug_str 0x0000000000000000 0x7ff0c ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.o .comment 0x0000000000000000 0x44 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.o .debug_frame 0x0000000000000000 0x250 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.o .ARM.attributes @@ -1013,7 +1011,7 @@ Discarded input sections .debug_macro 0x0000000000000000 0x295 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.o .debug_macro 0x0000000000000000 0x126 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.o .debug_line 0x0000000000000000 0x1390 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.o - .debug_str 0x0000000000000000 0x7fcdf ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.o + .debug_str 0x0000000000000000 0x7fcc6 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.o .comment 0x0000000000000000 0x44 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.o .debug_frame 0x0000000000000000 0xac ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.o .ARM.attributes @@ -1121,7 +1119,7 @@ Discarded input sections .debug_macro 0x0000000000000000 0x295 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.o .debug_macro 0x0000000000000000 0x126 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.o .debug_line 0x0000000000000000 0x9ec ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.o - .debug_str 0x0000000000000000 0x7fb77 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.o + .debug_str 0x0000000000000000 0x7fb5e ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.o .comment 0x0000000000000000 0x44 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.o .debug_frame 0x0000000000000000 0x174 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.o .ARM.attributes @@ -1246,7 +1244,7 @@ Discarded input sections .debug_macro 0x0000000000000000 0x295 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.o .debug_macro 0x0000000000000000 0x126 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.o .debug_line 0x0000000000000000 0xa9c ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.o - .debug_str 0x0000000000000000 0x7fcfb ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.o + .debug_str 0x0000000000000000 0x7fce2 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.o .comment 0x0000000000000000 0x44 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.o .debug_frame 0x0000000000000000 0x274 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.o .ARM.attributes @@ -1380,7 +1378,7 @@ Discarded input sections .debug_macro 0x0000000000000000 0x295 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.o .debug_macro 0x0000000000000000 0x126 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.o .debug_line 0x0000000000000000 0xba1 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.o - .debug_str 0x0000000000000000 0x7fe1e ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.o + .debug_str 0x0000000000000000 0x7fe05 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.o .comment 0x0000000000000000 0x44 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.o .debug_frame 0x0000000000000000 0x334 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.o .ARM.attributes @@ -1471,7 +1469,7 @@ Discarded input sections .debug_macro 0x0000000000000000 0x295 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.o .debug_macro 0x0000000000000000 0x126 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.o .debug_line 0x0000000000000000 0x758 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.o - .debug_str 0x0000000000000000 0x7fb45 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.o + .debug_str 0x0000000000000000 0x7fb2c ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.o .comment 0x0000000000000000 0x44 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.o .debug_frame 0x0000000000000000 0xb0 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.o .ARM.attributes @@ -1518,8 +1516,6 @@ Discarded input sections .bss 0x0000000000000000 0x0 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o .text.HAL_GPIO_DeInit 0x0000000000000000 0x1c8 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o - .text.HAL_GPIO_ReadPin - 0x0000000000000000 0x30 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o .text.HAL_GPIO_TogglePin 0x0000000000000000 0x34 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o .text.HAL_GPIO_LockPin @@ -1684,7 +1680,7 @@ Discarded input sections .debug_macro 0x0000000000000000 0x295 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.o .debug_macro 0x0000000000000000 0x126 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.o .debug_line 0x0000000000000000 0x909 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.o - .debug_str 0x0000000000000000 0x7fd53 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.o + .debug_str 0x0000000000000000 0x7fd3a ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.o .comment 0x0000000000000000 0x44 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.o .debug_frame 0x0000000000000000 0x264 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.o .ARM.attributes @@ -1794,7 +1790,7 @@ Discarded input sections .debug_macro 0x0000000000000000 0x295 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.o .debug_macro 0x0000000000000000 0x126 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.o .debug_line 0x0000000000000000 0x8b7 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.o - .debug_str 0x0000000000000000 0x7fcce ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.o + .debug_str 0x0000000000000000 0x7fcb5 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.o .comment 0x0000000000000000 0x44 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.o .debug_frame 0x0000000000000000 0x15c ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.o .ARM.attributes @@ -1991,7 +1987,7 @@ Discarded input sections .debug_macro 0x0000000000000000 0x295 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.o .debug_macro 0x0000000000000000 0x126 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.o .debug_line 0x0000000000000000 0xa57 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.o - .debug_str 0x0000000000000000 0x7fca5 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.o + .debug_str 0x0000000000000000 0x7fc8c ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.o .comment 0x0000000000000000 0x44 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.o .debug_frame 0x0000000000000000 0x118 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.o .ARM.attributes @@ -2079,7 +2075,7 @@ Discarded input sections .debug_macro 0x0000000000000000 0x295 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.o .debug_macro 0x0000000000000000 0x126 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.o .debug_line 0x0000000000000000 0x70b ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.o - .debug_str 0x0000000000000000 0x7f946 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.o + .debug_str 0x0000000000000000 0x7f92d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.o .comment 0x0000000000000000 0x44 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.o .ARM.attributes 0x0000000000000000 0x34 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.o @@ -2166,7 +2162,7 @@ Discarded input sections .debug_macro 0x0000000000000000 0x295 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.o .debug_macro 0x0000000000000000 0x126 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.o .debug_line 0x0000000000000000 0x70e ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.o - .debug_str 0x0000000000000000 0x7f949 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.o + .debug_str 0x0000000000000000 0x7f930 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.o .comment 0x0000000000000000 0x44 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.o .ARM.attributes 0x0000000000000000 0x34 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.o @@ -2222,8 +2218,6 @@ Discarded input sections 0x0000000000000000 0x14 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o .text.HAL_UART_MspDeInit 0x0000000000000000 0x14 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o - .text.HAL_UART_Receive - 0x0000000000000000 0x144 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o .text.HAL_UART_Transmit_IT 0x0000000000000000 0x8a ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o .text.HAL_UART_Receive_IT @@ -2659,7 +2653,7 @@ LOAD C:/ST/STM32CubeIDE_1.13.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.ext 0x0000000008000000 g_pfnVectors 0x0000000008000198 . = ALIGN (0x4) -.text 0x0000000008000198 0x1e58 +.text 0x0000000008000198 0x2054 0x0000000008000198 . = ALIGN (0x4) *(.text) .text 0x0000000008000198 0x40 C:/ST/STM32CubeIDE_1.13.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.0.202305231506/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7e-m+fp/hard/crtbegin.o @@ -2671,276 +2665,280 @@ LOAD C:/ST/STM32CubeIDE_1.13.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.ext 0x00000000080004d0 __aeabi_idiv0 0x00000000080004d0 __aeabi_ldiv0 *(.text*) - .text.main 0x00000000080004d4 0x38 ./Core/Src/main.o + .text.main 0x00000000080004d4 0xc0 ./Core/Src/main.o 0x00000000080004d4 main .text.SystemClock_Config - 0x000000000800050c 0xd4 ./Core/Src/main.o - 0x000000000800050c SystemClock_Config + 0x0000000008000594 0xd4 ./Core/Src/main.o + 0x0000000008000594 SystemClock_Config .text.MX_USART2_UART_Init - 0x00000000080005e0 0x54 ./Core/Src/main.o + 0x0000000008000668 0x54 ./Core/Src/main.o .text.MX_GPIO_Init - 0x0000000008000634 0xf4 ./Core/Src/main.o + 0x00000000080006bc 0xf4 ./Core/Src/main.o .text.Error_Handler - 0x0000000008000728 0xa ./Core/Src/main.o - 0x0000000008000728 Error_Handler - *fill* 0x0000000008000732 0x2 + 0x00000000080007b0 0xa ./Core/Src/main.o + 0x00000000080007b0 Error_Handler + *fill* 0x00000000080007ba 0x2 .text.HAL_MspInit - 0x0000000008000734 0x50 ./Core/Src/stm32f4xx_hal_msp.o - 0x0000000008000734 HAL_MspInit + 0x00000000080007bc 0x50 ./Core/Src/stm32f4xx_hal_msp.o + 0x00000000080007bc HAL_MspInit .text.HAL_UART_MspInit - 0x0000000008000784 0x90 ./Core/Src/stm32f4xx_hal_msp.o - 0x0000000008000784 HAL_UART_MspInit + 0x000000000800080c 0x90 ./Core/Src/stm32f4xx_hal_msp.o + 0x000000000800080c HAL_UART_MspInit .text.NMI_Handler - 0x0000000008000814 0x6 ./Core/Src/stm32f4xx_it.o - 0x0000000008000814 NMI_Handler + 0x000000000800089c 0x6 ./Core/Src/stm32f4xx_it.o + 0x000000000800089c NMI_Handler .text.HardFault_Handler - 0x000000000800081a 0x6 ./Core/Src/stm32f4xx_it.o - 0x000000000800081a HardFault_Handler + 0x00000000080008a2 0x6 ./Core/Src/stm32f4xx_it.o + 0x00000000080008a2 HardFault_Handler .text.MemManage_Handler - 0x0000000008000820 0x6 ./Core/Src/stm32f4xx_it.o - 0x0000000008000820 MemManage_Handler + 0x00000000080008a8 0x6 ./Core/Src/stm32f4xx_it.o + 0x00000000080008a8 MemManage_Handler .text.BusFault_Handler - 0x0000000008000826 0x6 ./Core/Src/stm32f4xx_it.o - 0x0000000008000826 BusFault_Handler + 0x00000000080008ae 0x6 ./Core/Src/stm32f4xx_it.o + 0x00000000080008ae BusFault_Handler .text.UsageFault_Handler - 0x000000000800082c 0x6 ./Core/Src/stm32f4xx_it.o - 0x000000000800082c UsageFault_Handler + 0x00000000080008b4 0x6 ./Core/Src/stm32f4xx_it.o + 0x00000000080008b4 UsageFault_Handler .text.SVC_Handler - 0x0000000008000832 0xe ./Core/Src/stm32f4xx_it.o - 0x0000000008000832 SVC_Handler + 0x00000000080008ba 0xe ./Core/Src/stm32f4xx_it.o + 0x00000000080008ba SVC_Handler .text.DebugMon_Handler - 0x0000000008000840 0xe ./Core/Src/stm32f4xx_it.o - 0x0000000008000840 DebugMon_Handler + 0x00000000080008c8 0xe ./Core/Src/stm32f4xx_it.o + 0x00000000080008c8 DebugMon_Handler .text.PendSV_Handler - 0x000000000800084e 0xe ./Core/Src/stm32f4xx_it.o - 0x000000000800084e PendSV_Handler + 0x00000000080008d6 0xe ./Core/Src/stm32f4xx_it.o + 0x00000000080008d6 PendSV_Handler .text.SysTick_Handler - 0x000000000800085c 0xc ./Core/Src/stm32f4xx_it.o - 0x000000000800085c SysTick_Handler + 0x00000000080008e4 0xc ./Core/Src/stm32f4xx_it.o + 0x00000000080008e4 SysTick_Handler .text.SystemInit - 0x0000000008000868 0x24 ./Core/Src/system_stm32f4xx.o - 0x0000000008000868 SystemInit + 0x00000000080008f0 0x24 ./Core/Src/system_stm32f4xx.o + 0x00000000080008f0 SystemInit .text.Reset_Handler - 0x000000000800088c 0x50 ./Core/Startup/startup_stm32f411retx.o - 0x000000000800088c Reset_Handler + 0x0000000008000914 0x50 ./Core/Startup/startup_stm32f411retx.o + 0x0000000008000914 Reset_Handler .text.Default_Handler - 0x00000000080008dc 0x2 ./Core/Startup/startup_stm32f411retx.o - 0x00000000080008dc RTC_Alarm_IRQHandler - 0x00000000080008dc EXTI2_IRQHandler - 0x00000000080008dc SPI4_IRQHandler - 0x00000000080008dc TIM1_CC_IRQHandler - 0x00000000080008dc DMA2_Stream5_IRQHandler - 0x00000000080008dc DMA1_Stream5_IRQHandler - 0x00000000080008dc PVD_IRQHandler - 0x00000000080008dc SDIO_IRQHandler - 0x00000000080008dc TAMP_STAMP_IRQHandler - 0x00000000080008dc EXTI3_IRQHandler - 0x00000000080008dc TIM1_UP_TIM10_IRQHandler - 0x00000000080008dc I2C3_ER_IRQHandler - 0x00000000080008dc EXTI0_IRQHandler - 0x00000000080008dc I2C2_EV_IRQHandler - 0x00000000080008dc DMA1_Stream2_IRQHandler - 0x00000000080008dc FPU_IRQHandler - 0x00000000080008dc DMA2_Stream2_IRQHandler - 0x00000000080008dc SPI1_IRQHandler - 0x00000000080008dc TIM1_BRK_TIM9_IRQHandler - 0x00000000080008dc DMA2_Stream3_IRQHandler - 0x00000000080008dc USART6_IRQHandler - 0x00000000080008dc DMA2_Stream0_IRQHandler - 0x00000000080008dc TIM4_IRQHandler - 0x00000000080008dc I2C1_EV_IRQHandler - 0x00000000080008dc DMA1_Stream6_IRQHandler - 0x00000000080008dc DMA1_Stream1_IRQHandler - 0x00000000080008dc TIM3_IRQHandler - 0x00000000080008dc RCC_IRQHandler - 0x00000000080008dc Default_Handler - 0x00000000080008dc EXTI15_10_IRQHandler - 0x00000000080008dc ADC_IRQHandler - 0x00000000080008dc DMA1_Stream7_IRQHandler - 0x00000000080008dc SPI5_IRQHandler - 0x00000000080008dc TIM5_IRQHandler - 0x00000000080008dc DMA2_Stream7_IRQHandler - 0x00000000080008dc I2C3_EV_IRQHandler - 0x00000000080008dc EXTI9_5_IRQHandler - 0x00000000080008dc RTC_WKUP_IRQHandler - 0x00000000080008dc SPI2_IRQHandler - 0x00000000080008dc DMA1_Stream0_IRQHandler - 0x00000000080008dc EXTI4_IRQHandler - 0x00000000080008dc WWDG_IRQHandler - 0x00000000080008dc TIM2_IRQHandler - 0x00000000080008dc OTG_FS_WKUP_IRQHandler - 0x00000000080008dc TIM1_TRG_COM_TIM11_IRQHandler - 0x00000000080008dc EXTI1_IRQHandler - 0x00000000080008dc USART2_IRQHandler - 0x00000000080008dc I2C2_ER_IRQHandler - 0x00000000080008dc DMA2_Stream1_IRQHandler - 0x00000000080008dc FLASH_IRQHandler - 0x00000000080008dc DMA2_Stream4_IRQHandler - 0x00000000080008dc USART1_IRQHandler - 0x00000000080008dc OTG_FS_IRQHandler - 0x00000000080008dc SPI3_IRQHandler - 0x00000000080008dc DMA1_Stream4_IRQHandler - 0x00000000080008dc I2C1_ER_IRQHandler - 0x00000000080008dc DMA2_Stream6_IRQHandler - 0x00000000080008dc DMA1_Stream3_IRQHandler - *fill* 0x00000000080008de 0x2 + 0x0000000008000964 0x2 ./Core/Startup/startup_stm32f411retx.o + 0x0000000008000964 RTC_Alarm_IRQHandler + 0x0000000008000964 EXTI2_IRQHandler + 0x0000000008000964 SPI4_IRQHandler + 0x0000000008000964 TIM1_CC_IRQHandler + 0x0000000008000964 DMA2_Stream5_IRQHandler + 0x0000000008000964 DMA1_Stream5_IRQHandler + 0x0000000008000964 PVD_IRQHandler + 0x0000000008000964 SDIO_IRQHandler + 0x0000000008000964 TAMP_STAMP_IRQHandler + 0x0000000008000964 EXTI3_IRQHandler + 0x0000000008000964 TIM1_UP_TIM10_IRQHandler + 0x0000000008000964 I2C3_ER_IRQHandler + 0x0000000008000964 EXTI0_IRQHandler + 0x0000000008000964 I2C2_EV_IRQHandler + 0x0000000008000964 DMA1_Stream2_IRQHandler + 0x0000000008000964 FPU_IRQHandler + 0x0000000008000964 DMA2_Stream2_IRQHandler + 0x0000000008000964 SPI1_IRQHandler + 0x0000000008000964 TIM1_BRK_TIM9_IRQHandler + 0x0000000008000964 DMA2_Stream3_IRQHandler + 0x0000000008000964 USART6_IRQHandler + 0x0000000008000964 DMA2_Stream0_IRQHandler + 0x0000000008000964 TIM4_IRQHandler + 0x0000000008000964 I2C1_EV_IRQHandler + 0x0000000008000964 DMA1_Stream6_IRQHandler + 0x0000000008000964 DMA1_Stream1_IRQHandler + 0x0000000008000964 TIM3_IRQHandler + 0x0000000008000964 RCC_IRQHandler + 0x0000000008000964 Default_Handler + 0x0000000008000964 EXTI15_10_IRQHandler + 0x0000000008000964 ADC_IRQHandler + 0x0000000008000964 DMA1_Stream7_IRQHandler + 0x0000000008000964 SPI5_IRQHandler + 0x0000000008000964 TIM5_IRQHandler + 0x0000000008000964 DMA2_Stream7_IRQHandler + 0x0000000008000964 I2C3_EV_IRQHandler + 0x0000000008000964 EXTI9_5_IRQHandler + 0x0000000008000964 RTC_WKUP_IRQHandler + 0x0000000008000964 SPI2_IRQHandler + 0x0000000008000964 DMA1_Stream0_IRQHandler + 0x0000000008000964 EXTI4_IRQHandler + 0x0000000008000964 WWDG_IRQHandler + 0x0000000008000964 TIM2_IRQHandler + 0x0000000008000964 OTG_FS_WKUP_IRQHandler + 0x0000000008000964 TIM1_TRG_COM_TIM11_IRQHandler + 0x0000000008000964 EXTI1_IRQHandler + 0x0000000008000964 USART2_IRQHandler + 0x0000000008000964 I2C2_ER_IRQHandler + 0x0000000008000964 DMA2_Stream1_IRQHandler + 0x0000000008000964 FLASH_IRQHandler + 0x0000000008000964 DMA2_Stream4_IRQHandler + 0x0000000008000964 USART1_IRQHandler + 0x0000000008000964 OTG_FS_IRQHandler + 0x0000000008000964 SPI3_IRQHandler + 0x0000000008000964 DMA1_Stream4_IRQHandler + 0x0000000008000964 I2C1_ER_IRQHandler + 0x0000000008000964 DMA2_Stream6_IRQHandler + 0x0000000008000964 DMA1_Stream3_IRQHandler + *fill* 0x0000000008000966 0x2 .text.HAL_Init - 0x00000000080008e0 0x44 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o - 0x00000000080008e0 HAL_Init + 0x0000000008000968 0x44 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o + 0x0000000008000968 HAL_Init .text.HAL_InitTick - 0x0000000008000924 0x60 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o - 0x0000000008000924 HAL_InitTick + 0x00000000080009ac 0x60 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o + 0x00000000080009ac HAL_InitTick .text.HAL_IncTick - 0x0000000008000984 0x28 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o - 0x0000000008000984 HAL_IncTick + 0x0000000008000a0c 0x28 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o + 0x0000000008000a0c HAL_IncTick .text.HAL_GetTick - 0x00000000080009ac 0x18 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o - 0x00000000080009ac HAL_GetTick + 0x0000000008000a34 0x18 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o + 0x0000000008000a34 HAL_GetTick .text.__NVIC_SetPriorityGrouping - 0x00000000080009c4 0x48 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o + 0x0000000008000a4c 0x48 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o .text.__NVIC_GetPriorityGrouping - 0x0000000008000a0c 0x1c ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o + 0x0000000008000a94 0x1c ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o .text.__NVIC_SetPriority - 0x0000000008000a28 0x54 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o + 0x0000000008000ab0 0x54 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o .text.NVIC_EncodePriority - 0x0000000008000a7c 0x66 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o - *fill* 0x0000000008000ae2 0x2 + 0x0000000008000b04 0x66 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o + *fill* 0x0000000008000b6a 0x2 .text.SysTick_Config - 0x0000000008000ae4 0x44 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o + 0x0000000008000b6c 0x44 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o .text.HAL_NVIC_SetPriorityGrouping - 0x0000000008000b28 0x16 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o - 0x0000000008000b28 HAL_NVIC_SetPriorityGrouping + 0x0000000008000bb0 0x16 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o + 0x0000000008000bb0 HAL_NVIC_SetPriorityGrouping .text.HAL_NVIC_SetPriority - 0x0000000008000b3e 0x38 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o - 0x0000000008000b3e HAL_NVIC_SetPriority + 0x0000000008000bc6 0x38 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o + 0x0000000008000bc6 HAL_NVIC_SetPriority .text.HAL_SYSTICK_Config - 0x0000000008000b76 0x18 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o - 0x0000000008000b76 HAL_SYSTICK_Config - *fill* 0x0000000008000b8e 0x2 + 0x0000000008000bfe 0x18 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o + 0x0000000008000bfe HAL_SYSTICK_Config + *fill* 0x0000000008000c16 0x2 .text.HAL_GPIO_Init - 0x0000000008000b90 0x308 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o - 0x0000000008000b90 HAL_GPIO_Init + 0x0000000008000c18 0x308 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o + 0x0000000008000c18 HAL_GPIO_Init + .text.HAL_GPIO_ReadPin + 0x0000000008000f20 0x30 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o + 0x0000000008000f20 HAL_GPIO_ReadPin .text.HAL_GPIO_WritePin - 0x0000000008000e98 0x32 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o - 0x0000000008000e98 HAL_GPIO_WritePin - *fill* 0x0000000008000eca 0x2 + 0x0000000008000f50 0x32 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o + 0x0000000008000f50 HAL_GPIO_WritePin + *fill* 0x0000000008000f82 0x2 .text.HAL_RCC_OscConfig - 0x0000000008000ecc 0x4f0 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o - 0x0000000008000ecc HAL_RCC_OscConfig + 0x0000000008000f84 0x4f0 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o + 0x0000000008000f84 HAL_RCC_OscConfig .text.HAL_RCC_ClockConfig - 0x00000000080013bc 0x1cc ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o - 0x00000000080013bc HAL_RCC_ClockConfig + 0x0000000008001474 0x1cc ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o + 0x0000000008001474 HAL_RCC_ClockConfig .text.HAL_RCC_GetSysClockFreq - 0x0000000008001588 0x20c ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o - 0x0000000008001588 HAL_RCC_GetSysClockFreq + 0x0000000008001640 0x20c ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o + 0x0000000008001640 HAL_RCC_GetSysClockFreq .text.HAL_RCC_GetHCLKFreq - 0x0000000008001794 0x18 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o - 0x0000000008001794 HAL_RCC_GetHCLKFreq + 0x000000000800184c 0x18 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o + 0x000000000800184c HAL_RCC_GetHCLKFreq .text.HAL_RCC_GetPCLK1Freq - 0x00000000080017ac 0x28 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o - 0x00000000080017ac HAL_RCC_GetPCLK1Freq + 0x0000000008001864 0x28 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o + 0x0000000008001864 HAL_RCC_GetPCLK1Freq .text.HAL_RCC_GetPCLK2Freq - 0x00000000080017d4 0x28 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o - 0x00000000080017d4 HAL_RCC_GetPCLK2Freq + 0x000000000800188c 0x28 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o + 0x000000000800188c HAL_RCC_GetPCLK2Freq .text.HAL_UART_Init - 0x00000000080017fc 0x9a ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o - 0x00000000080017fc HAL_UART_Init + 0x00000000080018b4 0x9a ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o + 0x00000000080018b4 HAL_UART_Init .text.HAL_UART_Transmit - 0x0000000008001896 0x124 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o - 0x0000000008001896 HAL_UART_Transmit + 0x000000000800194e 0x124 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o + 0x000000000800194e HAL_UART_Transmit + .text.HAL_UART_Receive + 0x0000000008001a72 0x144 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o + 0x0000000008001a72 HAL_UART_Receive .text.UART_WaitOnFlagUntilTimeout - 0x00000000080019ba 0xdc ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o - *fill* 0x0000000008001a96 0x2 + 0x0000000008001bb6 0xdc ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o + *fill* 0x0000000008001c92 0x2 .text.UART_SetConfig - 0x0000000008001a98 0x4e8 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o - .text.memset 0x0000000008001f80 0x10 C:/ST/STM32CubeIDE_1.13.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.0.202305231506/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard\libc_nano.a(libc_a-memset.o) - 0x0000000008001f80 memset + 0x0000000008001c94 0x4e8 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o + .text.memset 0x000000000800217c 0x10 C:/ST/STM32CubeIDE_1.13.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.0.202305231506/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard\libc_nano.a(libc_a-memset.o) + 0x000000000800217c memset .text.__libc_init_array - 0x0000000008001f90 0x48 C:/ST/STM32CubeIDE_1.13.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.0.202305231506/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard\libc_nano.a(libc_a-init.o) - 0x0000000008001f90 __libc_init_array + 0x000000000800218c 0x48 C:/ST/STM32CubeIDE_1.13.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.0.202305231506/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard\libc_nano.a(libc_a-init.o) + 0x000000000800218c __libc_init_array *(.glue_7) - .glue_7 0x0000000008001fd8 0x0 linker stubs + .glue_7 0x00000000080021d4 0x0 linker stubs *(.glue_7t) - .glue_7t 0x0000000008001fd8 0x0 linker stubs + .glue_7t 0x00000000080021d4 0x0 linker stubs *(.eh_frame) - .eh_frame 0x0000000008001fd8 0x0 C:/ST/STM32CubeIDE_1.13.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.0.202305231506/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7e-m+fp/hard/crtbegin.o + .eh_frame 0x00000000080021d4 0x0 C:/ST/STM32CubeIDE_1.13.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.0.202305231506/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7e-m+fp/hard/crtbegin.o *(.init) - .init 0x0000000008001fd8 0x4 C:/ST/STM32CubeIDE_1.13.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.0.202305231506/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7e-m+fp/hard/crti.o - 0x0000000008001fd8 _init - .init 0x0000000008001fdc 0x8 C:/ST/STM32CubeIDE_1.13.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.0.202305231506/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7e-m+fp/hard/crtn.o + .init 0x00000000080021d4 0x4 C:/ST/STM32CubeIDE_1.13.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.0.202305231506/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7e-m+fp/hard/crti.o + 0x00000000080021d4 _init + .init 0x00000000080021d8 0x8 C:/ST/STM32CubeIDE_1.13.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.0.202305231506/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7e-m+fp/hard/crtn.o *(.fini) - .fini 0x0000000008001fe4 0x4 C:/ST/STM32CubeIDE_1.13.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.0.202305231506/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7e-m+fp/hard/crti.o - 0x0000000008001fe4 _fini - .fini 0x0000000008001fe8 0x8 C:/ST/STM32CubeIDE_1.13.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.0.202305231506/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7e-m+fp/hard/crtn.o - 0x0000000008001ff0 . = ALIGN (0x4) - 0x0000000008001ff0 _etext = . + .fini 0x00000000080021e0 0x4 C:/ST/STM32CubeIDE_1.13.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.0.202305231506/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7e-m+fp/hard/crti.o + 0x00000000080021e0 _fini + .fini 0x00000000080021e4 0x8 C:/ST/STM32CubeIDE_1.13.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.0.202305231506/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7e-m+fp/hard/crtn.o + 0x00000000080021ec . = ALIGN (0x4) + 0x00000000080021ec _etext = . -.vfp11_veneer 0x0000000008001ff0 0x0 - .vfp11_veneer 0x0000000008001ff0 0x0 linker stubs +.vfp11_veneer 0x00000000080021ec 0x0 + .vfp11_veneer 0x00000000080021ec 0x0 linker stubs -.v4_bx 0x0000000008001ff0 0x0 - .v4_bx 0x0000000008001ff0 0x0 linker stubs +.v4_bx 0x00000000080021ec 0x0 + .v4_bx 0x00000000080021ec 0x0 linker stubs -.iplt 0x0000000008001ff0 0x0 - .iplt 0x0000000008001ff0 0x0 C:/ST/STM32CubeIDE_1.13.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.0.202305231506/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7e-m+fp/hard/crtbegin.o +.iplt 0x00000000080021ec 0x0 + .iplt 0x00000000080021ec 0x0 C:/ST/STM32CubeIDE_1.13.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.0.202305231506/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7e-m+fp/hard/crtbegin.o -.rodata 0x0000000008001ff0 0x20 - 0x0000000008001ff0 . = ALIGN (0x4) +.rodata 0x00000000080021ec 0x18 + 0x00000000080021ec . = ALIGN (0x4) *(.rodata) - .rodata 0x0000000008001ff0 0x6 ./Core/Src/main.o *(.rodata*) - *fill* 0x0000000008001ff6 0x2 .rodata.AHBPrescTable - 0x0000000008001ff8 0x10 ./Core/Src/system_stm32f4xx.o - 0x0000000008001ff8 AHBPrescTable + 0x00000000080021ec 0x10 ./Core/Src/system_stm32f4xx.o + 0x00000000080021ec AHBPrescTable .rodata.APBPrescTable - 0x0000000008002008 0x8 ./Core/Src/system_stm32f4xx.o - 0x0000000008002008 APBPrescTable - 0x0000000008002010 . = ALIGN (0x4) + 0x00000000080021fc 0x8 ./Core/Src/system_stm32f4xx.o + 0x00000000080021fc APBPrescTable + 0x0000000008002204 . = ALIGN (0x4) -.ARM.extab 0x0000000008002010 0x0 - 0x0000000008002010 . = ALIGN (0x4) +.ARM.extab 0x0000000008002204 0x0 + 0x0000000008002204 . = ALIGN (0x4) *(.ARM.extab* .gnu.linkonce.armextab.*) - 0x0000000008002010 . = ALIGN (0x4) + 0x0000000008002204 . = ALIGN (0x4) -.ARM 0x0000000008002010 0x8 - 0x0000000008002010 . = ALIGN (0x4) - 0x0000000008002010 __exidx_start = . +.ARM 0x0000000008002204 0x8 + 0x0000000008002204 . = ALIGN (0x4) + 0x0000000008002204 __exidx_start = . *(.ARM.exidx*) - .ARM.exidx 0x0000000008002010 0x8 C:/ST/STM32CubeIDE_1.13.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.0.202305231506/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7e-m+fp/hard\libgcc.a(_udivmoddi4.o) - 0x0000000008002018 __exidx_end = . - 0x0000000008002018 . = ALIGN (0x4) + .ARM.exidx 0x0000000008002204 0x8 C:/ST/STM32CubeIDE_1.13.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.0.202305231506/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7e-m+fp/hard\libgcc.a(_udivmoddi4.o) + 0x000000000800220c __exidx_end = . + 0x000000000800220c . = ALIGN (0x4) -.rel.dyn 0x0000000008002018 0x0 - .rel.iplt 0x0000000008002018 0x0 C:/ST/STM32CubeIDE_1.13.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.0.202305231506/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7e-m+fp/hard/crtbegin.o +.rel.dyn 0x000000000800220c 0x0 + .rel.iplt 0x000000000800220c 0x0 C:/ST/STM32CubeIDE_1.13.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.0.202305231506/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7e-m+fp/hard/crtbegin.o -.preinit_array 0x0000000008002018 0x0 - 0x0000000008002018 . = ALIGN (0x4) - 0x0000000008002018 PROVIDE (__preinit_array_start = .) +.preinit_array 0x000000000800220c 0x0 + 0x000000000800220c . = ALIGN (0x4) + 0x000000000800220c PROVIDE (__preinit_array_start = .) *(.preinit_array*) - 0x0000000008002018 PROVIDE (__preinit_array_end = .) - 0x0000000008002018 . = ALIGN (0x4) + 0x000000000800220c PROVIDE (__preinit_array_end = .) + 0x000000000800220c . = ALIGN (0x4) -.init_array 0x0000000008002018 0x4 - 0x0000000008002018 . = ALIGN (0x4) - 0x0000000008002018 PROVIDE (__init_array_start = .) +.init_array 0x000000000800220c 0x4 + 0x000000000800220c . = ALIGN (0x4) + 0x000000000800220c PROVIDE (__init_array_start = .) *(SORT_BY_NAME(.init_array.*)) *(.init_array*) - .init_array 0x0000000008002018 0x4 C:/ST/STM32CubeIDE_1.13.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.0.202305231506/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7e-m+fp/hard/crtbegin.o - 0x000000000800201c PROVIDE (__init_array_end = .) - 0x000000000800201c . = ALIGN (0x4) + .init_array 0x000000000800220c 0x4 C:/ST/STM32CubeIDE_1.13.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.0.202305231506/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7e-m+fp/hard/crtbegin.o + 0x0000000008002210 PROVIDE (__init_array_end = .) + 0x0000000008002210 . = ALIGN (0x4) -.fini_array 0x000000000800201c 0x4 - 0x000000000800201c . = ALIGN (0x4) +.fini_array 0x0000000008002210 0x4 + 0x0000000008002210 . = ALIGN (0x4) [!provide] PROVIDE (__fini_array_start = .) *(SORT_BY_NAME(.fini_array.*)) *(.fini_array*) - .fini_array 0x000000000800201c 0x4 C:/ST/STM32CubeIDE_1.13.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.0.202305231506/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7e-m+fp/hard/crtbegin.o + .fini_array 0x0000000008002210 0x4 C:/ST/STM32CubeIDE_1.13.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.0.202305231506/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7e-m+fp/hard/crtbegin.o [!provide] PROVIDE (__fini_array_end = .) - 0x0000000008002020 . = ALIGN (0x4) - 0x0000000008002020 _sidata = LOADADDR (.data) + 0x0000000008002214 . = ALIGN (0x4) + 0x0000000008002214 _sidata = LOADADDR (.data) -.data 0x0000000020000000 0xc load address 0x0000000008002020 +.data 0x0000000020000000 0xc load address 0x0000000008002214 0x0000000020000000 . = ALIGN (0x4) 0x0000000020000000 _sdata = . *(.data) @@ -2960,11 +2958,11 @@ LOAD C:/ST/STM32CubeIDE_1.13.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.ext *fill* 0x0000000020000009 0x3 0x000000002000000c _edata = . -.igot.plt 0x000000002000000c 0x0 load address 0x000000000800202c +.igot.plt 0x000000002000000c 0x0 load address 0x0000000008002220 .igot.plt 0x000000002000000c 0x0 C:/ST/STM32CubeIDE_1.13.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.0.202305231506/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7e-m+fp/hard/crtbegin.o 0x000000002000000c . = ALIGN (0x4) -.bss 0x000000002000000c 0x70 load address 0x000000000800202c +.bss 0x000000002000000c 0x70 load address 0x0000000008002220 0x000000002000000c _sbss = . 0x000000002000000c __bss_start__ = _sbss *(.bss) @@ -2975,7 +2973,10 @@ LOAD C:/ST/STM32CubeIDE_1.13.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.ext .bss.uart_buffer 0x000000002000006c 0xa ./Core/Src/main.o 0x000000002000006c uart_buffer - *fill* 0x0000000020000076 0x2 + .bss.uart_index + 0x0000000020000076 0x1 ./Core/Src/main.o + 0x0000000020000076 uart_index + *fill* 0x0000000020000077 0x1 .bss.uwTick 0x0000000020000078 0x4 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o 0x0000000020000078 uwTick *(COMMON) @@ -2984,7 +2985,7 @@ LOAD C:/ST/STM32CubeIDE_1.13.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.ext 0x000000002000007c __bss_end__ = _ebss ._user_heap_stack - 0x000000002000007c 0x604 load address 0x000000000800202c + 0x000000002000007c 0x604 load address 0x0000000008002220 0x0000000020000080 . = ALIGN (0x8) *fill* 0x000000002000007c 0x4 [!provide] PROVIDE (end = .) @@ -3058,29 +3059,29 @@ LOAD C:/ST/STM32CubeIDE_1.13.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.ext .comment 0x0000000000000043 0x44 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o .comment 0x0000000000000043 0x44 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o -.debug_info 0x0000000000000000 0x70ba - .debug_info 0x0000000000000000 0xc14 ./Core/Src/main.o - .debug_info 0x0000000000000c14 0x90f ./Core/Src/stm32f4xx_hal_msp.o - .debug_info 0x0000000000001523 0x112 ./Core/Src/stm32f4xx_it.o - .debug_info 0x0000000000001635 0x53e ./Core/Src/system_stm32f4xx.o - .debug_info 0x0000000000001b73 0x23 ./Core/Startup/startup_stm32f411retx.o - .debug_info 0x0000000000001b96 0x8c4 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o - .debug_info 0x000000000000245a 0xcb6 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o - .debug_info 0x0000000000003110 0x6f9 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o - .debug_info 0x0000000000003809 0x8f2 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o - .debug_info 0x00000000000040fb 0x2fbf ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o +.debug_info 0x0000000000000000 0x7126 + .debug_info 0x0000000000000000 0xc80 ./Core/Src/main.o + .debug_info 0x0000000000000c80 0x90f ./Core/Src/stm32f4xx_hal_msp.o + .debug_info 0x000000000000158f 0x112 ./Core/Src/stm32f4xx_it.o + .debug_info 0x00000000000016a1 0x53e ./Core/Src/system_stm32f4xx.o + .debug_info 0x0000000000001bdf 0x23 ./Core/Startup/startup_stm32f411retx.o + .debug_info 0x0000000000001c02 0x8c4 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o + .debug_info 0x00000000000024c6 0xcb6 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o + .debug_info 0x000000000000317c 0x6f9 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o + .debug_info 0x0000000000003875 0x8f2 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o + .debug_info 0x0000000000004167 0x2fbf ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o -.debug_abbrev 0x0000000000000000 0x12d1 - .debug_abbrev 0x0000000000000000 0x25c ./Core/Src/main.o - .debug_abbrev 0x000000000000025c 0x1c1 ./Core/Src/stm32f4xx_hal_msp.o - .debug_abbrev 0x000000000000041d 0x73 ./Core/Src/stm32f4xx_it.o - .debug_abbrev 0x0000000000000490 0x11a ./Core/Src/system_stm32f4xx.o - .debug_abbrev 0x00000000000005aa 0x12 ./Core/Startup/startup_stm32f411retx.o - .debug_abbrev 0x00000000000005bc 0x24b ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o - .debug_abbrev 0x0000000000000807 0x327 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o - .debug_abbrev 0x0000000000000b2e 0x1d3 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o - .debug_abbrev 0x0000000000000d01 0x2b5 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o - .debug_abbrev 0x0000000000000fb6 0x31b ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o +.debug_abbrev 0x0000000000000000 0x12ea + .debug_abbrev 0x0000000000000000 0x275 ./Core/Src/main.o + .debug_abbrev 0x0000000000000275 0x1c1 ./Core/Src/stm32f4xx_hal_msp.o + .debug_abbrev 0x0000000000000436 0x73 ./Core/Src/stm32f4xx_it.o + .debug_abbrev 0x00000000000004a9 0x11a ./Core/Src/system_stm32f4xx.o + .debug_abbrev 0x00000000000005c3 0x12 ./Core/Startup/startup_stm32f411retx.o + .debug_abbrev 0x00000000000005d5 0x24b ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o + .debug_abbrev 0x0000000000000820 0x327 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o + .debug_abbrev 0x0000000000000b47 0x1d3 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o + .debug_abbrev 0x0000000000000d1a 0x2b5 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o + .debug_abbrev 0x0000000000000fcf 0x31b ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o .debug_aranges 0x0000000000000000 0x608 .debug_aranges @@ -3105,27 +3106,27 @@ LOAD C:/ST/STM32CubeIDE_1.13.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.ext 0x0000000000000408 0x200 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o .debug_rnglists - 0x0000000000000000 0x49c + 0x0000000000000000 0x49d .debug_rnglists - 0x0000000000000000 0x2d ./Core/Src/main.o + 0x0000000000000000 0x2e ./Core/Src/main.o .debug_rnglists - 0x000000000000002d 0x20 ./Core/Src/stm32f4xx_hal_msp.o + 0x000000000000002e 0x20 ./Core/Src/stm32f4xx_hal_msp.o .debug_rnglists - 0x000000000000004d 0x43 ./Core/Src/stm32f4xx_it.o + 0x000000000000004e 0x43 ./Core/Src/stm32f4xx_it.o .debug_rnglists - 0x0000000000000090 0x1a ./Core/Src/system_stm32f4xx.o + 0x0000000000000091 0x1a ./Core/Src/system_stm32f4xx.o .debug_rnglists - 0x00000000000000aa 0x19 ./Core/Startup/startup_stm32f411retx.o + 0x00000000000000ab 0x19 ./Core/Startup/startup_stm32f411retx.o .debug_rnglists - 0x00000000000000c3 0xaf ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o + 0x00000000000000c4 0xaf ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o .debug_rnglists - 0x0000000000000172 0xce ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o + 0x0000000000000173 0xce ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o .debug_rnglists - 0x0000000000000240 0x3f ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o + 0x0000000000000241 0x3f ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o .debug_rnglists - 0x000000000000027f 0x66 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o + 0x0000000000000280 0x66 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o .debug_rnglists - 0x00000000000002e5 0x1b7 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o + 0x00000000000002e6 0x1b7 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o .debug_macro 0x0000000000000000 0x1483d .debug_macro 0x0000000000000000 0x1c9 ./Core/Src/main.o @@ -3176,57 +3177,57 @@ LOAD C:/ST/STM32CubeIDE_1.13.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.ext .debug_macro 0x00000000000144a4 0x1de ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o .debug_macro 0x0000000000014682 0x1bb ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o -.debug_line 0x0000000000000000 0x7952 - .debug_line 0x0000000000000000 0x812 ./Core/Src/main.o - .debug_line 0x0000000000000812 0x764 ./Core/Src/stm32f4xx_hal_msp.o - .debug_line 0x0000000000000f76 0x7d8 ./Core/Src/stm32f4xx_it.o - .debug_line 0x000000000000174e 0x797 ./Core/Src/system_stm32f4xx.o - .debug_line 0x0000000000001ee5 0x7a ./Core/Startup/startup_stm32f411retx.o - .debug_line 0x0000000000001f5f 0x9fd ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o - .debug_line 0x000000000000295c 0xcac ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o - .debug_line 0x0000000000003608 0xb35 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o - .debug_line 0x000000000000413d 0xd76 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o - .debug_line 0x0000000000004eb3 0x2a9f ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o +.debug_line 0x0000000000000000 0x798a + .debug_line 0x0000000000000000 0x84a ./Core/Src/main.o + .debug_line 0x000000000000084a 0x764 ./Core/Src/stm32f4xx_hal_msp.o + .debug_line 0x0000000000000fae 0x7d8 ./Core/Src/stm32f4xx_it.o + .debug_line 0x0000000000001786 0x797 ./Core/Src/system_stm32f4xx.o + .debug_line 0x0000000000001f1d 0x7a ./Core/Startup/startup_stm32f411retx.o + .debug_line 0x0000000000001f97 0x9fd ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o + .debug_line 0x0000000000002994 0xcac ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o + .debug_line 0x0000000000003640 0xb35 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o + .debug_line 0x0000000000004175 0xd76 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o + .debug_line 0x0000000000004eeb 0x2a9f ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o -.debug_str 0x0000000000000000 0x818ec - .debug_str 0x0000000000000000 0x80007 ./Core/Src/main.o - 0x802c5 (size before relaxing) - .debug_str 0x0000000000080007 0x83 ./Core/Src/stm32f4xx_hal_msp.o - 0x800de (size before relaxing) - .debug_str 0x000000000008008a 0xc9 ./Core/Src/stm32f4xx_it.o - 0x7fb3e (size before relaxing) - .debug_str 0x0000000000080153 0xdb ./Core/Src/system_stm32f4xx.o - 0x7fb1d (size before relaxing) - .debug_str 0x000000000008022e 0x34 ./Core/Startup/startup_stm32f411retx.o - 0x7e (size before relaxing) - .debug_str 0x0000000000080262 0x9a5 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o - 0x80549 (size before relaxing) - .debug_str 0x0000000000080c07 0x354 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o - 0x8026a (size before relaxing) - .debug_str 0x0000000000080f5b 0x121 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o - 0x7fc98 (size before relaxing) +.debug_str 0x0000000000000000 0x818db + .debug_str 0x0000000000000000 0x80018 ./Core/Src/main.o + 0x802d6 (size before relaxing) + .debug_str 0x0000000000080018 0x83 ./Core/Src/stm32f4xx_hal_msp.o + 0x800c5 (size before relaxing) + .debug_str 0x000000000008009b 0xc9 ./Core/Src/stm32f4xx_it.o + 0x7fb25 (size before relaxing) + .debug_str 0x0000000000080164 0xdb ./Core/Src/system_stm32f4xx.o + 0x7fb04 (size before relaxing) + .debug_str 0x000000000008023f 0x34 ./Core/Startup/startup_stm32f411retx.o + 0x65 (size before relaxing) + .debug_str 0x0000000000080273 0x9a5 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o + 0x80530 (size before relaxing) + .debug_str 0x0000000000080c18 0x354 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o + 0x80251 (size before relaxing) + .debug_str 0x0000000000080f6c 0x110 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o + 0x7fc7f (size before relaxing) .debug_str 0x000000000008107c 0x233 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o - 0x7ff51 (size before relaxing) - .debug_str 0x00000000000812af 0x63d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o - 0x804de (size before relaxing) + 0x7ff38 (size before relaxing) + .debug_str 0x00000000000812af 0x62c ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o + 0x804c5 (size before relaxing) -.debug_frame 0x0000000000000000 0x17a4 - .debug_frame 0x0000000000000000 0xa8 ./Core/Src/main.o - .debug_frame 0x00000000000000a8 0x7c ./Core/Src/stm32f4xx_hal_msp.o - .debug_frame 0x0000000000000124 0x104 ./Core/Src/stm32f4xx_it.o - .debug_frame 0x0000000000000228 0x58 ./Core/Src/system_stm32f4xx.o - .debug_frame 0x0000000000000280 0x374 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o - .debug_frame 0x00000000000005f4 0x498 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o - .debug_frame 0x0000000000000a8c 0x14c ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o - .debug_frame 0x0000000000000bd8 0x1f4 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o - .debug_frame 0x0000000000000dcc 0x92c ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o - .debug_frame 0x00000000000016f8 0x20 C:/ST/STM32CubeIDE_1.13.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.0.202305231506/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard\libc_nano.a(libc_a-memset.o) - .debug_frame 0x0000000000001718 0x2c C:/ST/STM32CubeIDE_1.13.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.0.202305231506/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard\libc_nano.a(libc_a-init.o) - .debug_frame 0x0000000000001744 0x2c C:/ST/STM32CubeIDE_1.13.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.0.202305231506/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7e-m+fp/hard\libgcc.a(_aeabi_uldivmod.o) - .debug_frame 0x0000000000001770 0x34 C:/ST/STM32CubeIDE_1.13.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.0.202305231506/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7e-m+fp/hard\libgcc.a(_udivmoddi4.o) +.debug_frame 0x0000000000000000 0x17a8 + .debug_frame 0x0000000000000000 0xac ./Core/Src/main.o + .debug_frame 0x00000000000000ac 0x7c ./Core/Src/stm32f4xx_hal_msp.o + .debug_frame 0x0000000000000128 0x104 ./Core/Src/stm32f4xx_it.o + .debug_frame 0x000000000000022c 0x58 ./Core/Src/system_stm32f4xx.o + .debug_frame 0x0000000000000284 0x374 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o + .debug_frame 0x00000000000005f8 0x498 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o + .debug_frame 0x0000000000000a90 0x14c ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o + .debug_frame 0x0000000000000bdc 0x1f4 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o + .debug_frame 0x0000000000000dd0 0x92c ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o + .debug_frame 0x00000000000016fc 0x20 C:/ST/STM32CubeIDE_1.13.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.0.202305231506/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard\libc_nano.a(libc_a-memset.o) + .debug_frame 0x000000000000171c 0x2c C:/ST/STM32CubeIDE_1.13.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.0.202305231506/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard\libc_nano.a(libc_a-init.o) + .debug_frame 0x0000000000001748 0x2c C:/ST/STM32CubeIDE_1.13.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.0.202305231506/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7e-m+fp/hard\libgcc.a(_aeabi_uldivmod.o) + .debug_frame 0x0000000000001774 0x34 C:/ST/STM32CubeIDE_1.13.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.0.202305231506/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7e-m+fp/hard\libgcc.a(_udivmoddi4.o) .debug_line_str - 0x0000000000000000 0x72 + 0x0000000000000000 0x59 .debug_line_str - 0x0000000000000000 0x72 ./Core/Startup/startup_stm32f411retx.o - 0x8a (size before relaxing) + 0x0000000000000000 0x59 ./Core/Startup/startup_stm32f411retx.o + 0x71 (size before relaxing) diff --git a/access_control_stm32/Debug/makefile b/access_control_stm32/Debug/makefile index 4a99f5b..0afac70 100644 --- a/access_control_stm32/Debug/makefile +++ b/access_control_stm32/Debug/makefile @@ -60,8 +60,8 @@ all: main-build main-build: access_control_stm32.elf secondary-outputs # Tool invocations -access_control_stm32.elf access_control_stm32.map: $(OBJS) $(USER_OBJS) C:\Users\hamha\Documents\GitHub\stm32-fmt-code\access_control_stm32\STM32F411RETX_FLASH.ld makefile objects.list $(OPTIONAL_TOOL_DEPS) - arm-none-eabi-gcc -o "access_control_stm32.elf" @"objects.list" $(USER_OBJS) $(LIBS) -mcpu=cortex-m4 -T"C:\Users\hamha\Documents\GitHub\stm32-fmt-code\access_control_stm32\STM32F411RETX_FLASH.ld" --specs=nosys.specs -Wl,-Map="access_control_stm32.map" -Wl,--gc-sections -static --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -Wl,--start-group -lc -lm -Wl,--end-group +access_control_stm32.elf access_control_stm32.map: $(OBJS) $(USER_OBJS) D:\Git\stm32-fmt-code\access_control_stm32\STM32F411RETX_FLASH.ld makefile objects.list $(OPTIONAL_TOOL_DEPS) + arm-none-eabi-gcc -o "access_control_stm32.elf" @"objects.list" $(USER_OBJS) $(LIBS) -mcpu=cortex-m4 -T"D:\Git\stm32-fmt-code\access_control_stm32\STM32F411RETX_FLASH.ld" --specs=nosys.specs -Wl,-Map="access_control_stm32.map" -Wl,--gc-sections -static --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -Wl,--start-group -lc -lm -Wl,--end-group @echo 'Finished building target: $@' @echo ' '